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qca-swiss-army-knife: print ar9280PciePhy_awow array

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This array has been introduced by commit
3b604b6cf811ba14e4c2bb3005e29bb2fba77af0
(ath9k_hw: INI changes for WoW for AR9002
chipsets) in linux, but it is not printed
from initvals.

Add it, and update ar9002_initvals.h and
checksums.txt.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
This commit is contained in:
Gabor Juhos 2012-12-17 23:17:41 +01:00 • committed by Luis R. Rodriguez
parent 4b02cb626e
commit 50b65746cf
3 changed files with 17 additions and 1 deletions
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14
tools/initvals/ar9002_initvals.h
View file

@ -926,6 +926,20 @@ static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
{0x00004044, 0x00000000},
};
static const u32 ar9280PciePhy_awow[][2] = {
/* Addr allmodes */
{0x00004040, 0x9248fd00},
{0x00004040, 0x24924924},
{0x00004040, 0xa8000019},
{0x00004040, 0x13160820},
{0x00004040, 0xe5980560},
{0x00004040, 0xc01dcffd},
{0x00004040, 0x1aaabe41},
{0x00004040, 0xbe105554},
{0x00004040, 0x00043007},
{0x00004044, 0x00000000},
};
static const u32 ar9285Modes_9285_1_2[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},

1
tools/initvals/checksums.txt
View file

@ -42,6 +42,7 @@ aa88585259661a6a85cd78ca2c86cee13286d124 ar9280Common_9280_2
67dab1c3ca3ebe1bb4997f0e076bded4496b5b0c ar9280Modes_original_tx_gain_9280_2
706b82bcdcf19a094a02eed21ed64dbd1f3a85b0 ar9280PciePhy_clkreq_off_L1_9280
a6621033d7308f8c85f3bfcd84265c261cfe1ea1 ar9280PciePhy_clkreq_always_on_L1_9280
a6621033d7308f8c85f3bfcd84265c261cfe1ea1 ar9280PciePhy_awow
a6621033d7308f8c85f3bfcd84265c261cfe1ea1 ar9285PciePhy_clkreq_always_on_L1_9285
706b82bcdcf19a094a02eed21ed64dbd1f3a85b0 ar9285PciePhy_clkreq_off_L1_9285
f668583c3777247a8fc7e316555270a94852ddb1 ar9285Modes_9285_1_2

3
tools/initvals/initvals.c
View file

@ -126,7 +126,7 @@ struct initval_family {
#define ar9280Modes_mixed_power_tx_gain_merlin2 ar9280Modes_mixed_power_tx_gain_9280_2
#define ar9280PciePhy_clkreq_off_L1_merlin ar9280PciePhy_clkreq_off_L1_9280
#define ar9280PciePhy_clkreq_always_on_L1_merlin ar9280PciePhy_clkreq_always_on_L1_9280
#define ar9280PciePhy_AWOW_merlin ar9280PciePhy_AWOW_9280
#define ar9280PciePhy_AWOW_merlin ar9280PciePhy_awow
#include "ar9280_merlin2.ini"
@ -651,6 +651,7 @@ static void ar9002_hw_print_initvals(bool check)
INI_PRINT(ar9280Modes_original_tx_gain_9280_2);
INI_PRINT(ar9280PciePhy_clkreq_off_L1_9280);
INI_PRINT(ar9280PciePhy_clkreq_always_on_L1_9280);
INI_PRINT(ar9280PciePhy_awow);
INI_PRINT_DUP2(ar9285PciePhy_clkreq_always_on_L1_9285,
ar9280PciePhy_clkreq_always_on_L1_9280);