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https://github.com/raspberrypi/pico-sdk.git
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f73f486bb4
All the approriate gpio_xxx functions now call check_gpio_param. This provides an easy way for a project to add simple range checking by defining a final version of check_gpio_param, which whatever error mechanism it chooses if an invalid value is passed. Refs #2736
281 lines
9.2 KiB
C++
281 lines
9.2 KiB
C++
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_GPIO_H
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#define _HARDWARE_GPIO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "pico.h"
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#include "hardware/irq.h"
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typedef enum gpio_function {
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GPIO_FUNC_XIP = 0,
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GPIO_FUNC_XIP_CS1 = 0,
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GPIO_FUNC_SPI = 1,
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GPIO_FUNC_UART = 2,
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GPIO_FUNC_I2C = 3,
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GPIO_FUNC_PWM = 4,
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GPIO_FUNC_SIO = 5,
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GPIO_FUNC_PIO0 = 6,
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GPIO_FUNC_PIO1 = 7,
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GPIO_FUNC_GPCK = 8,
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GPIO_FUNC_USB = 9,
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GPIO_FUNC_HSTX = 10,
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GPIO_FUNC_PIO2 = 11,
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GPIO_FUNC_CORESIGHT_TRACE = 12,
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GPIO_FUNC_UART_AUX = 13,
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GPIO_FUNC_NULL = 0x1f,
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}gpio_function_t;
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enum gpio_dir {
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GPIO_OUT = 1u, ///< set GPIO to output
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GPIO_IN = 0u, ///< set GPIO to input
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};
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enum gpio_irq_level {
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GPIO_IRQ_LEVEL_LOW = 0x1u, ///< IRQ when the GPIO pin is a logical 0
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GPIO_IRQ_LEVEL_HIGH = 0x2u, ///< IRQ when the GPIO pin is a logical 1
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GPIO_IRQ_EDGE_FALL = 0x4u, ///< IRQ when the GPIO has transitioned from a logical 1 to a logical 0
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GPIO_IRQ_EDGE_RISE = 0x8u, ///< IRQ when the GPIO has transitioned from a logical 0 to a logical 1
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};
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typedef void (*gpio_irq_callback_t)(uint gpio, uint32_t event_mask);
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enum gpio_override {
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GPIO_OVERRIDE_NORMAL = 0, ///< peripheral signal selected via \ref gpio_set_function
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GPIO_OVERRIDE_INVERT = 1, ///< invert peripheral signal selected via \ref gpio_set_function
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GPIO_OVERRIDE_LOW = 2, ///< drive low/disable output
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GPIO_OVERRIDE_HIGH = 3, ///< drive high/enable output
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};
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enum gpio_slew_rate {
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GPIO_SLEW_RATE_SLOW = 0, ///< Slew rate limiting enabled
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GPIO_SLEW_RATE_FAST = 1 ///< Slew rate limiting disabled
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};
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enum gpio_drive_strength {
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GPIO_DRIVE_STRENGTH_2MA = 0, ///< 2 mA nominal drive strength
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GPIO_DRIVE_STRENGTH_4MA = 1, ///< 4 mA nominal drive strength
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GPIO_DRIVE_STRENGTH_8MA = 2, ///< 8 mA nominal drive strength
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GPIO_DRIVE_STRENGTH_12MA = 3 ///< 12 mA nominal drive strength
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};
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void check_gpio_param(uint gpio);
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// ----------------------------------------------------------------------------
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// Pad Controls + IO Muxing
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// ----------------------------------------------------------------------------
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// Declarations for gpio.c
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void gpio_set_function(uint gpio, gpio_function_t fn);
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void gpio_set_function_masked(uint32_t gpio_mask, gpio_function_t fn);
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void gpio_set_function_masked64(uint64_t gpio_mask, gpio_function_t fn);
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gpio_function_t gpio_get_function(uint gpio);
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void gpio_set_pulls(uint gpio, bool up, bool down);
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void gpio_pull_up(uint gpio);
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bool gpio_is_pulled_up(uint gpio);
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void gpio_pull_down(uint gpio);
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bool gpio_is_pulled_down(uint gpio);
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void gpio_disable_pulls(uint gpio);
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void gpio_set_irqover(uint gpio, uint value);
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void gpio_set_outover(uint gpio, uint value);
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void gpio_set_inover(uint gpio, uint value);
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void gpio_set_oeover(uint gpio, uint value);
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void gpio_set_input_enabled(uint gpio, bool enabled);
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void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled);
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bool gpio_is_input_hysteresis_enabled(uint gpio);
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void gpio_set_slew_rate(uint gpio, enum gpio_slew_rate slew);
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enum gpio_slew_rate gpio_get_slew_rate(uint gpio);
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void gpio_set_drive_strength(uint gpio, enum gpio_drive_strength drive);
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enum gpio_drive_strength gpio_get_drive_strength(uint gpio);
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void gpio_set_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
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void gpio_set_irq_callback(gpio_irq_callback_t callback);
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void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t event_mask, bool enabled, gpio_irq_callback_t callback);
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void gpio_set_dormant_irq_enabled(uint gpio, uint32_t event_mask, bool enabled);
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uint32_t gpio_get_irq_event_mask(uint gpio);
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void gpio_acknowledge_irq(uint gpio, uint32_t event_mask);
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void gpio_add_raw_irq_handler_with_order_priority_masked(uint32_t gpio_mask, irq_handler_t handler, uint8_t order_priority);
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void gpio_add_raw_irq_handler_with_order_priority_masked64(uint64_t gpio_mask, irq_handler_t handler, uint8_t order_priority);
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void gpio_add_raw_irq_handler_with_order_priority(uint gpio, irq_handler_t handler, uint8_t order_priority);
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void gpio_add_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler);
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void gpio_add_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler);
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void gpio_add_raw_irq_handler(uint gpio, irq_handler_t handler);
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void gpio_remove_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler);
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void gpio_remove_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler);
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void gpio_remove_raw_irq_handler(uint gpio, irq_handler_t handler);
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// Configure a GPIO for direct input/output from software
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void gpio_init(uint gpio);
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void gpio_deinit(uint gpio);
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void gpio_init_mask(uint gpio_mask);
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// ----------------------------------------------------------------------------
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// Input
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// ----------------------------------------------------------------------------
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// Get the value of a single GPIO
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bool gpio_get(uint gpio);
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// Get raw value of all
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uint32_t gpio_get_all(void);
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uint64_t gpio_get_all64(void);
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// ----------------------------------------------------------------------------
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// Output
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// ----------------------------------------------------------------------------
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// Drive high every GPIO appearing in mask
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void gpio_set_mask(uint32_t mask);
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void gpio_set_mask64(uint64_t mask);
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void gpio_set_mask_n(uint n, uint32_t mask);
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void gpio_clr_mask(uint32_t mask);
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void gpio_clr_mask64(uint64_t mask);
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void gpio_clr_mask_n(uint n, uint32_t mask);
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// Toggle every GPIO appearing in mask
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void gpio_xor_mask(uint32_t mask);
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void gpio_xor_mask64(uint64_t mask);
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void gpio_xor_mask_n(uint n, uint32_t mask);
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// For each 1 bit in "mask", drive that pin to the value given by
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// corresponding bit in "value", leaving other pins unchanged.
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// Since this uses the TOGL alias, it is concurrency-safe with e.g. an IRQ
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// bashing different pins from the same core.
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void gpio_put_masked(uint32_t mask, uint32_t value);
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void gpio_put_masked64(uint64_t mask, uint64_t value);
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void gpio_put_masked_n(uint n, uint32_t mask, uint32_t value);
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// Drive all pins simultaneously
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void gpio_put_all(uint32_t value);
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void gpio_put_all64(uint64_t value);
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// Drive a single GPIO high/low
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void gpio_put(uint gpio, int value);
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// Determine whether a GPIO is currently driven high or low
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bool gpio_get_out_level(uint gpio);
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// ----------------------------------------------------------------------------
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// Direction
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// ----------------------------------------------------------------------------
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// Switch all GPIOs in "mask" to output
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void gpio_set_dir_out_masked(uint32_t mask);
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void gpio_set_dir_out_masked64(uint64_t mask);
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// Switch all GPIOs in "mask" to input
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void gpio_set_dir_in_masked(uint32_t mask);
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void gpio_set_dir_in_masked64(uint64_t mask);
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// For each 1 bit in "mask", switch that pin to the direction given by
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// corresponding bit in "value", leaving other pins unchanged.
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// E.g. gpio_set_dir_masked(0x3, 0x2); -> set pin 0 to input, pin 1 to output,
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// simultaneously.
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void gpio_set_dir_masked(uint32_t mask, uint32_t value);
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void gpio_set_dir_masked64(uint64_t mask, uint64_t value);
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// Set direction of all pins simultaneously.
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// For each bit in value,
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// 1 = out
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// 0 = in
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void gpio_set_dir_all_bits(uint32_t value);
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void gpio_set_dir_all_bits64(uint64_t values);
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// Set a single GPIO to input/output.
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// true = out
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// 0 = in
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void gpio_set_dir(uint gpio, bool out);
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// Check if a specific GPIO direction is OUT
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bool gpio_is_dir_out(uint gpio);
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// Get a specific GPIO direction
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// 1 = out
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// 0 = in
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uint gpio_get_dir(uint gpio);
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#if PICO_SECURE
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void gpio_assign_to_ns(uint gpio, bool ns);
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#endif
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extern void gpio_debug_pins_init(void);
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#ifdef __cplusplus
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}
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#endif
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// PICO_CONFIG: PICO_DEBUG_PIN_BASE, First pin to use for debug output (if enabled), min=0, max=31 on RP2350B, 29 otherwise, default=19, group=hardware_gpio
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#ifndef PICO_DEBUG_PIN_BASE
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#define PICO_DEBUG_PIN_BASE 19u
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#endif
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// PICO_CONFIG: PICO_DEBUG_PIN_COUNT, Number of pins to use for debug output (if enabled), min=1, max=32 on RP2350B, 30 otherwise, default=3, group=hardware_gpio
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#ifndef PICO_DEBUG_PIN_COUNT
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#define PICO_DEBUG_PIN_COUNT 3u
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#endif
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#ifndef __cplusplus
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// note these two macros may only be used once per and only apply per compilation unit (hence the CU_)
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#define CU_REGISTER_DEBUG_PINS(...) enum __unused DEBUG_PIN_TYPE { _none = 0, __VA_ARGS__ }; static enum DEBUG_PIN_TYPE __selected_debug_pins;
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#define CU_SELECT_DEBUG_PINS(x) static enum DEBUG_PIN_TYPE __selected_debug_pins = (x);
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#define DEBUG_PINS_ENABLED(p) (__selected_debug_pins == (p))
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#else
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#define CU_REGISTER_DEBUG_PINS(p...) \
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enum DEBUG_PIN_TYPE { _none = 0, p }; \
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template <enum DEBUG_PIN_TYPE> class __debug_pin_settings { \
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public: \
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static inline bool enabled() { return false; } \
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};
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#define CU_SELECT_DEBUG_PINS(x) template<> inline bool __debug_pin_settings<x>::enabled() { return true; };
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#define DEBUG_PINS_ENABLED(p) (__debug_pin_settings<p>::enabled())
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#endif
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#define DEBUG_PINS_SET(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_set_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
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#define DEBUG_PINS_CLR(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_clr_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
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#define DEBUG_PINS_XOR(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_xor_mask((unsigned)(v)<<PICO_DEBUG_PIN_BASE)
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#endif
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