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125 lines
5 KiB
C
125 lines
5 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_WATCHDOG_H
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#define _HARDWARE_WATCHDOG_H
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#include "pico.h"
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#include "hardware/structs/watchdog.h"
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/** \file hardware/watchdog.h
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* \defgroup hardware_watchdog hardware_watchdog
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*
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* \brief Hardware Watchdog Timer API
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*
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* Supporting functions for the Pico hardware watchdog timer.
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*
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* The RP2040 has a built in HW watchdog Timer. This is a countdown timer that can restart parts of the chip if it reaches zero.
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* For example, this can be used to restart the processor if the software running on it gets stuck in an infinite loop
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* or similar. The programmer has to periodically write a value to the watchdog to stop it reaching zero.
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*
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* \subsection watchdog_example Example
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* \addtogroup hardware_watchdog
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* \include hello_watchdog.c
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_WATCHDOG, Enable/disable assertions in the watchdog module, type=bool, default=0, group=hardware_watchdog
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#ifndef PARAM_ASSERTIONS_ENABLED_WATCHDOG
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#define PARAM_ASSERTIONS_ENABLED_WATCHDOG 0
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#endif
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/*! \brief Define actions to perform at watchdog timeout
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* \ingroup hardware_watchdog
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*
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* \note If \ref watchdog_start_tick value does not give a 1MHz clock to the watchdog system, then the \p delay_ms
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* parameter will not be in milliseconds. See the datasheet for more details.
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*
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* By default the SDK assumes a 12MHz XOSC and sets the \ref watchdog_start_tick appropriately.
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*
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* \param pc If Zero, a standard boot will be performed, if non-zero this is the program counter to jump to on reset.
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* \param sp If \p pc is non-zero, this will be the stack pointer used.
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* \param delay_ms Initial load value. Maximum value 8388, approximately 8.3s.
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*/
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void watchdog_reboot(uint32_t pc, uint32_t sp, uint32_t delay_ms);
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/*! \brief Start the watchdog tick
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* \ingroup hardware_watchdog
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*
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* \param cycles This needs to be a divider that when applied to the XOSC input, produces a 1MHz clock. So if the XOSC is
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* 12MHz, this will need to be 12.
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*/
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void watchdog_start_tick(uint cycles);
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/*! \brief Reload the watchdog counter with the amount of time set in watchdog_enable
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* \ingroup hardware_watchdog
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*
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*/
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void watchdog_update(void);
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/**
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* \brief Enable the watchdog
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* \ingroup hardware_watchdog
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*
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* \note If \ref watchdog_start_tick value does not give a 1MHz clock to the watchdog system, then the \p delay_ms
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* parameter will not be in milliseconds. See the datasheet for more details.
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*
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* By default the SDK assumes a 12MHz XOSC and sets the \ref watchdog_start_tick appropriately.
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*
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* This method sets a marker in the watchdog scratch register 4 that is checked by \ref watchdog_enable_caused_reboot.
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* If the device is subsequently reset via a call to watchdog_reboot (including for example by dragging a UF2
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* onto the RPI-RP2), then this value will be cleared, and so \ref watchdog_enable_caused_reboot will
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* return false.
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*
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* \param delay_ms Number of milliseconds before watchdog will reboot without watchdog_update being called. Maximum of 8388, which is approximately 8.3 seconds
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* \param pause_on_debug If the watchdog should be paused when the debugger is stepping through code
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*/
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void watchdog_enable(uint32_t delay_ms, bool pause_on_debug);
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/**
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* \brief Did the watchdog cause the last reboot?
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* \ingroup hardware_watchdog
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*
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* @return true If the watchdog timer or a watchdog force caused the last reboot
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* @return false If there has been no watchdog reboot since the last power on reset. A power on reset is typically caused by a power cycle or the run pin (reset button) being toggled.
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*/
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bool watchdog_caused_reboot(void);
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/**
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* \brief Did watchdog_enable cause the last reboot?
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* \ingroup hardware_watchdog
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*
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* Perform additional checking along with \ref watchdog_caused_reboot to determine if a watchdog timeout initiated by
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* \ref watchdog_enable caused the last reboot.
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*
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* This method checks for a special value in watchdog scratch register 4 placed there by \ref watchdog_enable.
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* This would not be present if a watchdog reset is initiated by \ref watchdog_reboot or by the RP2040 bootrom
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* (e.g. dragging a UF2 onto the RPI-RP2 drive).
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*
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* @return true If the watchdog timer or a watchdog force caused (see \ref watchdog_caused_reboot) the last reboot
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* and the watchdog reboot happened after \ref watchdog_enable was called
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* @return false If there has been no watchdog reboot since the last power on reset, or the watchdog reboot was not caused
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* by a watchdog timeout after \ref watchdog_enable was called.
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* A power on reset is typically caused by a power cycle or the run pin (reset button) being toggled.
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*/
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bool watchdog_enable_caused_reboot(void);
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/**
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* \brief Returns the number of microseconds before the watchdog will reboot the chip.
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* \ingroup hardware_watchdog
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*
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* @return The number of microseconds before the watchdog will reboot the chip.
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*/
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uint32_t watchdog_get_count(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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