mirror/pico-sdk
1
0
Fork 0
mirror of https://github.com/raspberrypi/pico-sdk.git synced 2025-12-10 07:14:36 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

Powman fix (#2499)

Browse source 
* Fix powman_timer_use_gpio

Fixes #2471

* Fix docs for clock_gpio_init etc for RP2350

You can also use gpios 13 and 15 on RP2350

* macro-ify the mapping from GPI to ext_time_ref_source - note i kept this private for now, as it's a bit murky

---------

Co-authored-by: graham sanderson <graham.sanderson@raspberrypi.com>
This commit is contained in:
Peter Harper 2025-07-16 14:17:16 +01:00 • committed by GitHub
parent c1981f5253
commit e62cd02a1b
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
2 changed files with 51 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

39
src/rp2_common/hardware_clocks/include/hardware/clocks.h
View file

@ -399,7 +399,18 @@ void clocks_enable_resus(resus_callback_t resus_callback);
/*! \brief Output an optionally divided clock to the specified gpio pin.
* \ingroup hardware_clocks
*
* \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 25. These GPIOs are connected to the GPOUT0-3 clock generators.
* \if rp2040_specific
* On RP2040 valid GPIOs are 21, 23, 24, 25.
* These GPIOs are connected to the GPOUT0-3 clock generators.
* \endif
* \if rp2350_specific
* On RP2350 valid GPIOs are 13, 15, 21, 23, 24, 25.
* GPIOs 13 and 21 are connected to the GPOUT0 clock generator.
* GPIOs 15 and 23 are connected to the GPOUT1 clock generator.
* GPIOs 24 and 25 are connected to the GPOUT2-3 clock generators.
* \endif
*
* \param gpio The GPIO pin to output the clock to.
* \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator.
* \param div_int The integer part of the value to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock. This is in range of 1..2^24-1 on RP2040
* and 1..2^16-1 on RP2350
@ -410,7 +421,18 @@ void clock_gpio_init_int_frac16(uint gpio, uint src, uint32_t div_int, uint16_t
/*! \brief Output an optionally divided clock to the specified gpio pin.
* \ingroup hardware_clocks
*
* \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 25. These GPIOs are connected to the GPOUT0-3 clock generators.
* * \if rp2040_specific
* On RP2040 valid GPIOs are 21, 23, 24, 25.
* These GPIOs are connected to the GPOUT0-3 clock generators.
* \endif
* \if rp2350_specific
* On RP2350 valid GPIOs are 13, 15, 21, 23, 24, 25.
* GPIOs 13 and 21 are connected to the GPOUT0 clock generator.
* GPIOs 15 and 23 are connected to the GPOUT1 clock generator.
* GPIOs 24 and 25 are connected to the GPOUT2-3 clock generators.
* \endif
*
* \param gpio The GPIO pin to output the clock to.
* \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator.
* \param div_int The integer part of the value to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock. This is in range of 1..2^24-1 on RP2040
* and 1..2^16-1 on RP2350
@ -428,7 +450,18 @@ static inline void clock_gpio_init_int_frac(uint gpio, uint src, uint32_t div_in
/*! \brief Output an optionally divided clock to the specified gpio pin.
* \ingroup hardware_clocks
*
* \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 25. These GPIOs are connected to the GPOUT0-3 clock generators.
* \if rp2040_specific
* On RP2040 valid GPIOs are 21, 23, 24, 25.
* These GPIOs are connected to the GPOUT0-3 clock generators.
* \endif
* \if rp2350_specific
* On RP2350 valid GPIOs are 13, 15, 21, 23, 24, 25.
* GPIOs 13 and 21 are connected to the GPOUT0 clock generator.
* GPIOs 15 and 23 are connected to the GPOUT1 clock generator.
* GPIOs 24 and 25 are connected to the GPOUT2-3 clock generators.
* \endif
*
* \param gpio The GPIO pin to output the clock to.
* \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator.
* \param div The float amount to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock.
*/

17
src/rp2_common/hardware_powman/powman.c
View file

@ -97,12 +97,25 @@ void powman_timer_set_1khz_tick_source_xosc_with_hz(uint32_t xosc_freq_hz) {
}
}
#ifndef GPIO_TO_POWMAN_EXT_TIME_REF_SOURCE
#define GPIO_TO_POWMAN_EXT_TIME_REF_SOURCE(gpio, default_ext_time_ref_source) \
((gpio) == 12 ? 0 : \
((gpio) == 20 ? 1 : \
((gpio) == 14 ? 2 : \
((gpio) == 22 ? 3 : \
(default_ext_time_ref_source)))))
#endif
static inline uint32_t gpio_to_powman_ext_time_ref_source(uint gpio, uint32_t default_ext_time_ref_source) {
return GPIO_TO_POWMAN_EXT_TIME_REF_SOURCE(gpio, ({invalid_params_if(HARDWARE_POWMAN, true); default_ext_time_ref_source;}));
}
static void powman_timer_use_gpio(uint32_t gpio, uint32_t use, uint32_t using) {
bool was_running = powman_timer_is_running();
if (was_running) powman_timer_stop();
invalid_params_if(HARDWARE_POWMAN, !((gpio == 12) || (gpio == 14) || (gpio == 20) || (gpio == 22)));
uint32_t source = gpio_to_powman_ext_time_ref_source(gpio, 0);
gpio_set_input_enabled(gpio, true);
powman_write(&powman_hw->ext_time_ref, gpio);
powman_write(&powman_hw->ext_time_ref, source);
powman_set_bits(&powman_hw->timer, use);
if (was_running) {
powman_timer_start();