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removed dangling #ifdef __cplusplus (#1941)
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1 changed files with 57 additions and 65 deletions
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@ -14,67 +14,65 @@
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#ifndef _BOARDS_METROTECH_XERXES_RP2040_H
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#define _BOARDS_METROTECH_XERXES_RP2040_H
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#define USR_SW_PIN 18
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#define USR_BTN_PIN 24
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#define USR_LED_PIN 25
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#define USR_SW_PIN 18
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#define USR_BTN_PIN 24
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#define USR_LED_PIN 25
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#define UART1_TX_PIN 8
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#define UART1_RX_PIN 9
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#define UART0_TX_PIN 16
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#define UART0_RX_PIN 17
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#define SPI0_MISO_PIN 0
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#define SPI0_CSN_PIN 1
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#define SPI0_CLK_PIN 2
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#define SPI0_MOSI_PIN 3
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#define I2C0_SDA_PIN 4
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#define I2C0_SCL_PIN 5
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#define EXT_3V3_EN_PIN 6
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#define RS_EN_PIN 19
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#define RS_TX_PIN UART0_TX_PIN
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#define RS_RX_PIN UART0_RX_PIN
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#define UART1_TX_PIN 8
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#define UART1_RX_PIN 9
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#define ADC0_PIN 26 // ADC0 and PWM5_A share the same pin
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#define ADC1_PIN 27 // ADC1 and PWM5_B share the same pin
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#define ADC2_PIN 28 // ADC2 and PWM6_A share the same pin
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#define ADC3_PIN 29 // ADC3 and PWM6_B share the same pin
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#define UART0_TX_PIN 16
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#define UART0_RX_PIN 17
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#define TMP0_PIN 22 // TMP0 and I2C1 share the same pin
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#define TMP1_PIN 23 // TMP1 and I2C1 share the same pin
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#define SPI0_MISO_PIN 0
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#define SPI0_CSN_PIN 1
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#define SPI0_CLK_PIN 2
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#define SPI0_MOSI_PIN 3
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#define I2C1_SDA_PIN 22 // I2C1 and TMP0 share the same pin
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#define I2C1_SCL_PIN 23 // I2C1 and TMP1 share the same pin
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#define I2C0_SDA_PIN 4
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#define I2C0_SCL_PIN 5
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#define PWM0_A_PIN 0 // PWM0_A and SPI0_MISO share the same pin
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#define PWM0_B_PIN 1 // PWM0_B and SPI0_CSN share the same pin
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#define PWM1_A_PIN 2 // PWM1_A and SPI0_CLK share the same pin
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#define PWM1_B_PIN 3 // PWM1_B and SPI0_MOSI share the same pin
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#define PWM2_A_PIN 4 // PWM2_A and I2C0_SDA share the same pin
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#define PWM2_B_PIN 5 // PWM2_B and I2C0_SCL share the same pin
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#define PWM3_A_PIN 22 // PWM3_A and TMP0 share the same pin
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#define PWM3_B_PIN 23 // PWM3_B and TMP1 share the same pin
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#define PWM4_A_PIN 24 // PWM4_A and USR_BTN share the same pin
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#define PWM4_B_PIN 25 // PWM4_B and USR_LED share the same pin
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#define PWM5_A_PIN 26 // PWM5_A and ADC0 share the same pin
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#define PWM5_B_PIN 27 // PWM5_B and ADC1 share the same pin
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#define PWM6_A_PIN 28 // PWM6_A and ADC2 share the same pin
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#define PWM6_B_PIN 29 // PWM6_B and ADC3 share the same pin
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#define EXT_3V3_EN_PIN 6
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#define CLK_GPIN1_PIN 22 // CLK_GPIN1 and TMP0 share the same pin
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#define CLK_GPOUT1_PIN 23 // CLK_GPOUT1 and TMP1 share the same pin
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#define RS_EN_PIN 19
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#define RS_TX_PIN UART0_TX_PIN
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#define RS_RX_PIN UART0_RX_PIN
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#define ADC0_PIN 26 // ADC0 and PWM5_A share the same pin
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#define ADC1_PIN 27 // ADC1 and PWM5_B share the same pin
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#define ADC2_PIN 28 // ADC2 and PWM6_A share the same pin
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#define ADC3_PIN 29 // ADC3 and PWM6_B share the same pin
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#define TMP0_PIN 22 // TMP0 and I2C1 share the same pin
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#define TMP1_PIN 23 // TMP1 and I2C1 share the same pin
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#define I2C1_SDA_PIN 22 // I2C1 and TMP0 share the same pin
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#define I2C1_SCL_PIN 23 // I2C1 and TMP1 share the same pin
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#define PWM0_A_PIN 0 // PWM0_A and SPI0_MISO share the same pin
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#define PWM0_B_PIN 1 // PWM0_B and SPI0_CSN share the same pin
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#define PWM1_A_PIN 2 // PWM1_A and SPI0_CLK share the same pin
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#define PWM1_B_PIN 3 // PWM1_B and SPI0_MOSI share the same pin
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#define PWM2_A_PIN 4 // PWM2_A and I2C0_SDA share the same pin
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#define PWM2_B_PIN 5 // PWM2_B and I2C0_SCL share the same pin
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#define PWM3_A_PIN 22 // PWM3_A and TMP0 share the same pin
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#define PWM3_B_PIN 23 // PWM3_B and TMP1 share the same pin
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#define PWM4_A_PIN 24 // PWM4_A and USR_BTN share the same pin
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#define PWM4_B_PIN 25 // PWM4_B and USR_LED share the same pin
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#define PWM5_A_PIN 26 // PWM5_A and ADC0 share the same pin
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#define PWM5_B_PIN 27 // PWM5_B and ADC1 share the same pin
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#define PWM6_A_PIN 28 // PWM6_A and ADC2 share the same pin
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#define PWM6_B_PIN 29 // PWM6_B and ADC3 share the same pin
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#define CLK_GPIN1_PIN 22 // CLK_GPIN1 and TMP0 share the same pin
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#define CLK_GPOUT1_PIN 23 // CLK_GPOUT1 and TMP1 share the same pin
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/// @brief Mask of pins that are used by the shield and not used by the board, eq. 0x3fc0033f
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#define SHIELD_MASK 1 << SPI0_MISO_PIN | 1 << SPI0_CSN_PIN | 1 << SPI0_CLK_PIN | 1 << SPI0_MOSI_PIN | \
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1 << I2C0_SDA_PIN | 1 << I2C0_SCL_PIN | \
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1 << UART1_TX_PIN | 1 << UART1_RX_PIN | \
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1 << ADC0_PIN | 1 << ADC1_PIN | 1 << ADC2_PIN | 1 << ADC3_PIN | \
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1 << TMP0_PIN | 1 << TMP1_PIN
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#define SHIELD_MASK 1 << SPI0_MISO_PIN | 1 << SPI0_CSN_PIN | 1 << SPI0_CLK_PIN | 1 << SPI0_MOSI_PIN | \
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1 << I2C0_SDA_PIN | 1 << I2C0_SCL_PIN | \
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1 << UART1_TX_PIN | 1 << UART1_RX_PIN | \
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1 << ADC0_PIN | 1 << ADC1_PIN | 1 << ADC2_PIN | 1 << ADC3_PIN | \
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1 << TMP0_PIN | 1 << TMP1_PIN
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// For board detection
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#define XERXES_RP2040
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@ -127,22 +125,21 @@
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// --- FLASH ---
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#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
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#ifndef __CLKDIV
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#ifndef __CLKDIV
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#define __CLKDIV 4
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#endif // !__CLKDIV
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#ifndef PICO_FLASH_SPI_CLKDIV
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/**
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* @brief divisor for SPI clock (default 4), must be divisible by 2
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*
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* This is critical for some flash chips, and can be set to 4 for some,
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*
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* This is critical for some flash chips, and can be set to 4 for some,
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* but needs to be at least 32 for others. Set using -DCLKDIV=<N*2> in cmake.
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* @note Increasing this value will help with BOOTLOOPs, but will slow down the flash chip.
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*/
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#define PICO_FLASH_SPI_CLKDIV __CLKDIV
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#endif // !PICO_FLASH_SPI_CLKDIV
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#ifndef PICO_XOSC_STARTUP_DELAY_MULTIPLIER
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#define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 16
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#endif // !PICO_XOSC_STARTUP_DELAY_MULTIPLIER
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@ -151,20 +148,15 @@
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#ifndef PICO_FLASH_SIZE_BYTES
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/**
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* @brief 16MiB, Flash size in bytes
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*
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*
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* This is the size of the flash chip on the board, not the size of the flash chip that is used for the bootloader.
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*/
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#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
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#endif // !PICO_FLASH_SIZE_BYTES
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// All boards have B1 RP2040
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#ifndef PICO_RP2040_B0_SUPPORTED
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#define PICO_RP2040_B0_SUPPORTED 0
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#ifndef PICO_RP2040_B0_SUPPORTED
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#define PICO_RP2040_B0_SUPPORTED 0
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#endif // !PICO_RP2040_B0_SUPPORTED
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#ifdef __cplusplus
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}
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#endif // __cplusplus
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#endif // _BOARDS_METROTECH_XERXES_RP2040_H
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