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clarify clock_configure and make it return the correct value achieved for bad clock inputs (#2225)
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2 changed files with 14 additions and 3 deletions
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@ -102,6 +102,10 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
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return false;
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uint32_t div = (uint32_t)((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / freq);
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// only clock divider of 1, or >= 2 are supported
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if (div < (2u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB)) {
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div = (1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB);
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}
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uint32_t actual_freq = (uint32_t) ((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / div);
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clock_configure_internal(clock, src, auxsrc, actual_freq, div);
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@ -262,11 +262,18 @@ extern "C" {
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typedef clock_num_t clock_handle_t;
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/*! \brief Configure the specified clock
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/*! \brief Configure the specified clock with automatic clock divisor setup
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* \ingroup hardware_clocks
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*
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* This method allows both the src_frequency of the input clock source AND the desired
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* frequency to be specified, and will set the clock divider to achieve the exact or higher frequency
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* achievable, with the maximum being the src_freq.
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*
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* Note: That the clock hardware only support divisors of exactly 1 or 2.0->65535.0
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*
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* See the tables in the description for details on the possible values for clock sources.
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*
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*
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* \param clock The clock to configure
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* \param src The main clock source, can be 0.
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* \param auxsrc The auxiliary clock source, which depends on which clock is being set. Can be 0
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@ -275,7 +282,7 @@ typedef clock_num_t clock_handle_t;
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*/
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bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq, uint32_t freq);
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/*! \brief Configure the specified clock to use the undividded input source
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/*! \brief Configure the specified clock to use the undivided input source
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* \ingroup hardware_clocks
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*
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* See the tables in the description for details on the possible values for clock sources.
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@ -287,7 +294,7 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
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*/
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void clock_configure_undivided(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq);
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/*! \brief Configure the specified clock to use the undividded input source
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/*! \brief Configure the specified clock to use the undivided input source
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* \ingroup hardware_clocks
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*
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* See the tables in the description for details on the possible values for clock sources.
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