diff --git a/MODULE.bazel b/MODULE.bazel index 111ed24c..27afacdd 100644 --- a/MODULE.bazel +++ b/MODULE.bazel @@ -16,7 +16,10 @@ http_archive( build_file = "//bazel/toolchain:gcc_arm_none_eabi.BUILD", sha256 = "8fd8b4a0a8d44ab2e195ccfbeef42223dfb3ede29d80f14dcf2183c34b8d199a", strip_prefix = "arm-gnu-toolchain-13.2.Rel1-aarch64-arm-none-eabi", - url = "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-aarch64-arm-none-eabi.tar.xz", + urls = [ + "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-aarch64-arm-none-eabi.tar.xz", + "https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-aarch64-arm-none-eabi.tar.xz", + ], ) http_archive( @@ -24,7 +27,10 @@ http_archive( build_file = "//bazel/toolchain:gcc_arm_none_eabi.BUILD", sha256 = "6cd1bbc1d9ae57312bcd169ae283153a9572bd6a8e4eeae2fedfbc33b115fdbb", strip_prefix = "arm-gnu-toolchain-13.2.Rel1-x86_64-arm-none-eabi", - url = "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-x86_64-arm-none-eabi.tar.xz", + urls = [ + "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-x86_64-arm-none-eabi.tar.xz", + "https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-x86_64-arm-none-eabi.tar.xz", + ], ) http_archive( @@ -32,7 +38,10 @@ http_archive( build_file = "//bazel/toolchain:gcc_arm_none_eabi.BUILD", sha256 = "51d933f00578aa28016c5e3c84f94403274ea7915539f8e56c13e2196437d18f", strip_prefix = "arm-gnu-toolchain-13.2.Rel1-mingw-w64-i686-arm-none-eabi", - url = "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-mingw-w64-i686-arm-none-eabi.zip", + urls = [ + "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-mingw-w64-i686-arm-none-eabi.zip", + "https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-mingw-w64-i686-arm-none-eabi.zip", + ], ) http_archive( @@ -40,7 +49,10 @@ http_archive( build_file = "//bazel/toolchain:gcc_arm_none_eabi.BUILD", sha256 = "075faa4f3e8eb45e59144858202351a28706f54a6ec17eedd88c9fb9412372cc", strip_prefix = "arm-gnu-toolchain-13.2.Rel1-darwin-x86_64-arm-none-eabi", - url = "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-x86_64-arm-none-eabi.tar.xz", + urls = [ + "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-x86_64-arm-none-eabi.tar.xz", + "https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-x86_64-arm-none-eabi.tar.xz", + ], ) http_archive( @@ -48,7 +60,10 @@ http_archive( build_file = "//bazel/toolchain:gcc_arm_none_eabi.BUILD", sha256 = "39c44f8af42695b7b871df42e346c09fee670ea8dfc11f17083e296ea2b0d279", strip_prefix = "arm-gnu-toolchain-13.2.Rel1-darwin-arm64-arm-none-eabi", - url = "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-arm64-arm-none-eabi.tar.xz", + urls = [ + "https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-arm64-arm-none-eabi.tar.xz", + "https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-darwin-arm64-arm-none-eabi.tar.xz", + ], ) http_archive( diff --git a/src/boards/include/boards/raspberry_pi_pi500_rp2040.h b/src/boards/include/boards/raspberry_pi_pi500_rp2040.h new file mode 100644 index 00000000..62af66fe --- /dev/null +++ b/src/boards/include/boards/raspberry_pi_pi500_rp2040.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2024 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _BOARDS_RASPBERRY_PI_PI500_RP2040_H +#define _BOARDS_RASPBERRY_PI_PI500_RP2040_H + +pico_board_cmake_set(PICO_PLATFORM, rp2040) + +// For board detection +#define RASPBERRY_PI_PI500_RP2040 + +// --- FLASH --- +// Pi 500 uses the same flash as the original Pi Pico (W25Q16JVUXIQ) but only DSPI pins are connected +#define PICO_BOOT_STAGE2_CHOOSE_W25X10CL 1 + +#ifndef PICO_FLASH_SPI_CLKDIV +#define PICO_FLASH_SPI_CLKDIV 2 +#endif + +pico_board_cmake_set_default(PICO_FLASH_SIZE_BYTES, (2 * 1024 * 1024)) +#ifndef PICO_FLASH_SIZE_BYTES +#define PICO_FLASH_SIZE_BYTES (2 * 1024 * 1024) +#endif + + +#ifndef PICO_RP2040_B0_SUPPORTED +#define PICO_RP2040_B0_SUPPORTED 0 +#endif + +// Keyboard CAPS Lock indicator LED as default +#define PI500_RP2040_CAPS_LOCK_LED_PIN 25 +#ifndef PICO_DEFAULT_LED_PIN +#define PICO_DEFAULT_LED_PIN PI500_RP2040_CAPS_LOCK_LED_PIN +#endif + +// --- PI 500 POWER MANAGEMENT --- +// Power button control (critical for Pi 500 power management) +#define PI500_RP2040_POWER_BUTTON_PIN 19 //DO NOT SCAN OR YOU WON'T BE ABLE TO TURN THE PI500 ON! +// Power key detection (shared with matrix pins but scanned separately) +#define PI500_RP2040_POWER_KEY_COL_PIN 20 // Also matrix col 11 +#define PI500_RP2040_POWER_KEY_ROW_PIN 6 // Also matrix row 6 + +// --- UART --- +#ifndef PICO_DEFAULT_UART +#define PICO_DEFAULT_UART 0 +#endif +#ifndef PICO_DEFAULT_UART_TX_PIN +#define PICO_DEFAULT_UART_TX_PIN 16 +#endif + +// --- KEYBOARD MATRIX PINS --- +// Matrix row pins (8 pins) +#define PI500_RP2040_MATRIX_ROW_0_PIN 0 +#define PI500_RP2040_MATRIX_ROW_1_PIN 1 +#define PI500_RP2040_MATRIX_ROW_2_PIN 2 +#define PI500_RP2040_MATRIX_ROW_3_PIN 3 +#define PI500_RP2040_MATRIX_ROW_4_PIN 4 +#define PI500_RP2040_MATRIX_ROW_5_PIN 5 +#define PI500_RP2040_MATRIX_ROW_6_PIN 6 +#define PI500_RP2040_MATRIX_ROW_7_PIN 7 + +// Matrix column pins (18 pins) +#define PI500_RP2040_MATRIX_COL_0_PIN 27 +#define PI500_RP2040_MATRIX_COL_1_PIN 8 +#define PI500_RP2040_MATRIX_COL_2_PIN 9 +#define PI500_RP2040_MATRIX_COL_3_PIN 10 +#define PI500_RP2040_MATRIX_COL_4_PIN 11 +#define PI500_RP2040_MATRIX_COL_5_PIN 12 +#define PI500_RP2040_MATRIX_COL_6_PIN 13 +#define PI500_RP2040_MATRIX_COL_7_PIN 14 +#define PI500_RP2040_MATRIX_COL_8_PIN 23 +#define PI500_RP2040_MATRIX_COL_9_PIN 24 +#define PI500_RP2040_MATRIX_COL_10_PIN 22 +#define PI500_RP2040_MATRIX_COL_11_PIN 20 +#define PI500_RP2040_MATRIX_COL_12_PIN 29 +#define PI500_RP2040_MATRIX_COL_13_PIN 18 +#define PI500_RP2040_MATRIX_COL_14_PIN 15 +#define PI500_RP2040_MATRIX_COL_15_PIN 21 +#define PI500_RP2040_MATRIX_COL_16_PIN 28 +#define PI500_RP2040_MATRIX_COL_17_PIN 26 + +#endif \ No newline at end of file diff --git a/src/boards/include/boards/waveshare_rp2350_pizero.h b/src/boards/include/boards/waveshare_rp2350_pizero.h new file mode 100644 index 00000000..1819aa0c --- /dev/null +++ b/src/boards/include/boards/waveshare_rp2350_pizero.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +// ----------------------------------------------------- +// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO +// SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES +// ----------------------------------------------------- + +// This header may be included by other board headers as "boards/waveshare_rp2350_pizero.h" + +#ifndef _BOARDS_WAVESHARE_RP2350_PIZERO_H +#define _BOARDS_WAVESHARE_RP2350_PIZERO_H + +pico_board_cmake_set(PICO_PLATFORM, rp2350) + +// For board detection +#define WAVESHARE_RP2350_PIZERO + +// --- RP2350 VARIANT --- +#define PICO_RP2350A 0 + +// --- UART --- +#ifndef PICO_DEFAULT_UART +#define PICO_DEFAULT_UART 1 +#endif +#ifndef PICO_DEFAULT_UART_TX_PIN +#define PICO_DEFAULT_UART_TX_PIN 4 +#endif +#ifndef PICO_DEFAULT_UART_RX_PIN +#define PICO_DEFAULT_UART_RX_PIN 5 +#endif + +// --- I2C --- +#ifndef PICO_DEFAULT_I2C +#define PICO_DEFAULT_I2C 1 +#endif +#ifndef PICO_DEFAULT_I2C_SDA_PIN +#define PICO_DEFAULT_I2C_SDA_PIN 2 +#endif +#ifndef PICO_DEFAULT_I2C_SCL_PIN +#define PICO_DEFAULT_I2C_SCL_PIN 3 +#endif + +// --- SPI --- +#ifndef PICO_DEFAULT_SPI +#define PICO_DEFAULT_SPI 1 +#endif +#ifndef PICO_DEFAULT_SPI_SCK_PIN +#define PICO_DEFAULT_SPI_SCK_PIN 10 +#endif +#ifndef PICO_DEFAULT_SPI_TX_PIN +#define PICO_DEFAULT_SPI_TX_PIN 11 +#endif +#ifndef PICO_DEFAULT_SPI_RX_PIN +#define PICO_DEFAULT_SPI_RX_PIN 12 +#endif +#ifndef PICO_DEFAULT_SPI_CSN_PIN +#define PICO_DEFAULT_SPI_CSN_PIN 13 +#endif + +// --- FLASH --- + +#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1 + +#ifndef PICO_FLASH_SPI_CLKDIV +#define PICO_FLASH_SPI_CLKDIV 2 +#endif + +pico_board_cmake_set_default(PICO_FLASH_SIZE_BYTES, (16 * 1024 * 1024)) +#ifndef PICO_FLASH_SIZE_BYTES +#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024) +#endif + +pico_board_cmake_set_default(PICO_RP2350_A2_SUPPORTED, 1) +#ifndef PICO_RP2350_A2_SUPPORTED +#define PICO_RP2350_A2_SUPPORTED 1 +#endif + +#endif diff --git a/src/common/pico_base_headers/BUILD.bazel b/src/common/pico_base_headers/BUILD.bazel index c22f9ae8..cb043d20 100644 --- a/src/common/pico_base_headers/BUILD.bazel +++ b/src/common/pico_base_headers/BUILD.bazel @@ -92,9 +92,11 @@ cc_library( includes = ["include"], visibility = [ "//src/common:__subpackages__", + "//src/host/hardware_irq:__pkg__", "//src/host/hardware_sync:__pkg__", "//src/host/hardware_timer:__pkg__", "//src/host/pico_platform:__pkg__", + "//src/host/pico_unique_id:__pkg__", "//src/rp2040/boot_stage2:__pkg__", "//src/rp2040/pico_platform:__pkg__", "//src/rp2350/boot_stage2:__pkg__", diff --git a/src/common/pico_sync/include/pico/critical_section.h b/src/common/pico_sync/include/pico/critical_section.h index 9874f9ff..5dd95474 100644 --- a/src/common/pico_sync/include/pico/critical_section.h +++ b/src/common/pico_sync/include/pico/critical_section.h @@ -84,7 +84,7 @@ __force_inline static void critical_section_exit(critical_section_t *crit_sec) { void critical_section_deinit(critical_section_t *crit_sec); /*! \brief Test whether a critical_section has been initialized - * \ingroup mutex + * \ingroup critical_section * * \param crit_sec Pointer to critical_section structure * \return true if the critical section is initialized, false otherwise diff --git a/src/host.cmake b/src/host.cmake index 10cafc7f..731469d3 100644 --- a/src/host.cmake +++ b/src/host.cmake @@ -38,6 +38,7 @@ include (${CMAKE_DIR}/no_hardware.cmake) pico_add_subdirectory(${HOST_DIR}/pico_stdio) pico_add_subdirectory(${HOST_DIR}/pico_stdlib) pico_add_subdirectory(${HOST_DIR}/pico_time_adapter) + pico_add_subdirectory(${HOST_DIR}/pico_unique_id) unset(CMAKE_DIR) unset(COMMON_DIR) diff --git a/src/host/hardware_gpio/BUILD.bazel b/src/host/hardware_gpio/BUILD.bazel index 29c13aae..ee9ab82b 100644 --- a/src/host/hardware_gpio/BUILD.bazel +++ b/src/host/hardware_gpio/BUILD.bazel @@ -8,6 +8,7 @@ cc_library( target_compatible_with = ["//bazel/constraint:host"], deps = [ "//src/common/pico_binary_info:LIB_PICO_BINARY_INFO", + "//src/host/hardware_irq", "//src/host/pico_platform", ], ) diff --git a/src/host/hardware_gpio/CMakeLists.txt b/src/host/hardware_gpio/CMakeLists.txt index 1bfb078f..97a93557 100644 --- a/src/host/hardware_gpio/CMakeLists.txt +++ b/src/host/hardware_gpio/CMakeLists.txt @@ -1 +1,2 @@ -pico_simple_hardware_target(gpio) \ No newline at end of file +pico_simple_hardware_target(gpio) +target_link_libraries(hardware_gpio INTERFACE hardware_irq) \ No newline at end of file diff --git a/src/host/hardware_gpio/gpio.c b/src/host/hardware_gpio/gpio.c index 1cbcbed3..67aa8798 100644 --- a/src/host/hardware_gpio/gpio.c +++ b/src/host/hardware_gpio/gpio.c @@ -6,142 +6,371 @@ #include "hardware/gpio.h" -// todo weak or replace? probably weak -void gpio_set_function(uint gpio, enum gpio_function fn) { +PICO_WEAK_FUNCTION_DEF(check_gpio_param) +void PICO_WEAK_FUNCTION_IMPL_NAME(check_gpio_param)(__unused uint gpio) { } -void gpio_pull_up(uint gpio) { +PICO_WEAK_FUNCTION_DEF(gpio_set_function) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_function)(uint gpio, __unused enum gpio_function fn) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_function_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_function_masked)(__unused uint32_t gpio_mask, __unused gpio_function_t fn) { } -void gpio_pull_down(uint gpio) { +PICO_WEAK_FUNCTION_DEF(gpio_set_function_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_function_masked64)(__unused uint64_t gpio_mask, __unused gpio_function_t fn) { } -void gpio_disable_pulls(uint gpio) { - +PICO_WEAK_FUNCTION_DEF(gpio_get_function) +gpio_function_t PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_function)(uint gpio) { + check_gpio_param(gpio); + return GPIO_FUNC_NULL; } -void gpio_set_pulls(uint gpio, bool up, bool down) { - +PICO_WEAK_FUNCTION_DEF(gpio_pull_up) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_pull_up)(uint gpio) { + check_gpio_param(gpio); } -void gpio_set_irqover(uint gpio, uint value) { - +PICO_WEAK_FUNCTION_DEF(gpio_is_pulled_up) +bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_is_pulled_up)(uint gpio) { + check_gpio_param(gpio); + return 0; } -void gpio_set_outover(uint gpio, uint value) { - +PICO_WEAK_FUNCTION_DEF(gpio_pull_down) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_pull_down)(uint gpio) { + check_gpio_param(gpio); } -void gpio_set_inover(uint gpio, uint value) { - +PICO_WEAK_FUNCTION_DEF(gpio_is_pulled_down) +bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_is_pulled_down)(uint gpio) { + check_gpio_param(gpio); + return 0; } -void gpio_set_oeover(uint gpio, uint value) { - +PICO_WEAK_FUNCTION_DEF(gpio_disable_pulls) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_disable_pulls)(uint gpio) { + check_gpio_param(gpio); } -void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled){ - +PICO_WEAK_FUNCTION_DEF(gpio_set_pulls) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_pulls)(uint gpio, __unused bool up, __unused bool down) { + check_gpio_param(gpio); } -bool gpio_is_input_hysteresis_enabled(uint gpio){ +PICO_WEAK_FUNCTION_DEF(gpio_set_irqover) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_irqover)(uint gpio, __unused uint value) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_outover) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_outover)(uint gpio, __unused uint value) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_inover) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_inover)(uint gpio, __unused uint value) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_oeover) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_oeover)(uint gpio, __unused uint value) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_input_enabled) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_input_enabled)(uint gpio, __unused bool enabled){ + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_input_hysteresis_enabled) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_input_hysteresis_enabled)(uint gpio, __unused bool enabled){ + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_is_input_hysteresis_enabled) +bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_is_input_hysteresis_enabled)(uint gpio){ + check_gpio_param(gpio); return true; } -void gpio_set_slew_rate(uint gpio, enum gpio_slew_rate slew){ - +PICO_WEAK_FUNCTION_DEF(gpio_set_slew_rate) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_slew_rate)(uint gpio, __unused enum gpio_slew_rate slew){ + check_gpio_param(gpio); } -enum gpio_slew_rate gpio_get_slew_rate(uint gpio){ +PICO_WEAK_FUNCTION_DEF(gpio_get_slew_rate) +enum gpio_slew_rate PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_slew_rate)(uint gpio){ + check_gpio_param(gpio); return GPIO_SLEW_RATE_FAST; } -void gpio_set_drive_strength(uint gpio, enum gpio_drive_strength drive){ - +PICO_WEAK_FUNCTION_DEF(gpio_set_drive_strength) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_drive_strength)(uint gpio, __unused enum gpio_drive_strength drive){ + check_gpio_param(gpio); } -enum gpio_drive_strength gpio_get_drive_strength(uint gpio){ +PICO_WEAK_FUNCTION_DEF(gpio_get_drive_strength) +enum gpio_drive_strength PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_drive_strength)(uint gpio){ + check_gpio_param(gpio); return GPIO_DRIVE_STRENGTH_4MA; } +PICO_WEAK_FUNCTION_DEF(gpio_set_irq_enabled) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_irq_enabled)(uint gpio, __unused uint32_t events, __unused bool enable) { + check_gpio_param(gpio); +} -void gpio_set_irq_enabled(uint gpio, uint32_t events, bool enable) { +PICO_WEAK_FUNCTION_DEF(gpio_set_irq_callback) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_irq_callback)(__unused gpio_irq_callback_t callback) { } -void gpio_acknowledge_irq(uint gpio, uint32_t events) { +PICO_WEAK_FUNCTION_DEF(gpio_set_irq_enabled_with_callback) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_irq_enabled_with_callback)(uint gpio, __unused uint32_t event_mask, __unused bool enabled, __unused gpio_irq_callback_t callback) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dormant_irq_enabled) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dormant_irq_enabled)(uint gpio, __unused uint32_t event_mask, __unused bool enabled) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_get_irq_event_mask) +uint32_t PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_irq_event_mask)(uint gpio) { + check_gpio_param(gpio); + return 0; +} + +PICO_WEAK_FUNCTION_DEF(gpio_acknowledge_irq) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_acknowledge_irq)(uint gpio, __unused uint32_t events) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler_with_order_priority_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler_with_order_priority_masked)(__unused uint32_t gpio_mask, __unused irq_handler_t handler, __unused uint8_t order_priority) { } -void gpio_init(uint gpio) { +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler_with_order_priority_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler_with_order_priority_masked64)(__unused uint64_t gpio_mask, __unused irq_handler_t handler, __unused uint8_t order_priority) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler_with_order_priority) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler_with_order_priority)(uint gpio, __unused irq_handler_t handler, __unused uint8_t order_priority) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler_masked)(__unused uint32_t gpio_mask, __unused irq_handler_t handler) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler_masked64)(__unused uint64_t gpio_mask, __unused irq_handler_t handler) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_add_raw_irq_handler) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_add_raw_irq_handler)(uint gpio, __unused irq_handler_t handler) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_remove_raw_irq_handler_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_remove_raw_irq_handler_masked)(__unused uint32_t gpio_mask, __unused irq_handler_t handler) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_remove_raw_irq_handler_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_remove_raw_irq_handler_masked64)(__unused uint64_t gpio_mask, __unused irq_handler_t handler) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_remove_raw_irq_handler) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_remove_raw_irq_handler)(uint gpio, __unused irq_handler_t handler) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_init) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_init)(uint gpio) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_deinit) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_deinit)(uint gpio) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_init_mask) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_init_mask)(__unused uint gpio_mask) { } PICO_WEAK_FUNCTION_DEF(gpio_get) - bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get)(uint gpio) { + check_gpio_param(gpio); return 0; } -uint32_t gpio_get_all() { +PICO_WEAK_FUNCTION_DEF(gpio_get_all) +uint32_t PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_all)(void) { return 0; } -void gpio_set_mask(uint32_t mask) { +PICO_WEAK_FUNCTION_DEF(gpio_get_all46) +uint64_t PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_all64)(void) { + return 0; +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_mask) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_mask)(__unused uint32_t mask) { } -void gpio_clr_mask(uint32_t mask) { +PICO_WEAK_FUNCTION_DEF(gpio_set_mask64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_mask64)(__unused uint64_t mask) { } -void gpio_xor_mask(uint32_t mask) { +PICO_WEAK_FUNCTION_DEF(gpio_set_mask_n) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_mask_n)(__unused uint n, __unused uint32_t mask) { } -void gpio_put_masked(uint32_t mask, uint32_t value) { + +PICO_WEAK_FUNCTION_DEF(gpio_clr_mask) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_clr_mask)(__unused uint32_t mask) { } -void gpio_put_all(uint32_t value) { +PICO_WEAK_FUNCTION_DEF(gpio_clr_mask64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_clr_mask64)(__unused uint64_t mask) { } -void gpio_put(uint gpio, int value) { +PICO_WEAK_FUNCTION_DEF(gpio_clr_mask_n) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_clr_mask_n)(__unused uint n, __unused uint32_t mask) { } -void gpio_set_dir_out_masked(uint32_t mask) { +PICO_WEAK_FUNCTION_DEF(gpio_xor_mask) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_xor_mask)(__unused uint32_t mask) { } -void gpio_set_dir_in_masked(uint32_t mask) { +PICO_WEAK_FUNCTION_DEF(gpio_xor_mask64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_xor_mask64)(__unused uint64_t mask) { } -void gpio_set_dir_masked(uint32_t mask, uint32_t value) { +PICO_WEAK_FUNCTION_DEF(gpio_xor_mask_n) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_xor_mask_n)(__unused uint n, __unused uint32_t mask) { } -void gpio_set_dir_all_bits(uint32_t value) { +PICO_WEAK_FUNCTION_DEF(gpio_put_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put_masked)(__unused uint32_t mask, __unused uint32_t value) { } -void gpio_set_dir(uint gpio, bool out) { +PICO_WEAK_FUNCTION_DEF(gpio_put_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put_masked64)(__unused uint64_t mask, __unused uint64_t value) { } -void gpio_debug_pins_init() { +PICO_WEAK_FUNCTION_DEF(gpio_put_mask_n) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put_mask_n)(__unused uint n, __unused uint32_t mask) { } -void gpio_set_input_enabled(uint gpio, bool enable) { +PICO_WEAK_FUNCTION_DEF(gpio_put_all) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put_all)(__unused uint32_t value) { } -void gpio_init_mask(uint gpio_mask) { +PICO_WEAK_FUNCTION_DEF(gpio_put_all64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put_all64)(__unused uint64_t value) { + +} +PICO_WEAK_FUNCTION_DEF(gpio_put) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_put)(uint gpio, __unused int value) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_out_masked) +bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_out_level)(uint gpio) { + check_gpio_param(gpio); + return 0; +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_out_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_out_masked)(__unused uint32_t mask) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_out_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_out_masked64)(__unused uint64_t mask) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_in_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_in_masked)(__unused uint32_t mask) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_in_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_in_masked64)(__unused uint64_t mask) { + +} +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_masked) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_masked)(__unused uint32_t mask, __unused uint32_t value) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_masked64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_masked64)(__unused uint64_t mask, __unused uint64_t value) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_all_bits) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_all_bits)(__unused uint32_t value) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir_all_bits64) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir_all_bits64)(__unused uint64_t value) { + +} + +PICO_WEAK_FUNCTION_DEF(gpio_set_dir) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_set_dir)(uint gpio, __unused bool out) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_is_dir_out) +bool PICO_WEAK_FUNCTION_IMPL_NAME(gpio_is_dir_out)(uint gpio) { + check_gpio_param(gpio); + return 0; +} + +PICO_WEAK_FUNCTION_DEF(gpio_get_dir) +uint PICO_WEAK_FUNCTION_IMPL_NAME(gpio_get_dir)(uint gpio) { + return gpio_is_dir_out(gpio); // note GPIO_OUT is 1/true and GPIO_IN is 0/false anyway +} + +PICO_WEAK_FUNCTION_DEF(gpio_assign_to_ns) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_assign_to_ns)(uint gpio, __unused bool ns) { + check_gpio_param(gpio); +} + +PICO_WEAK_FUNCTION_DEF(gpio_debug_pins_init) +void PICO_WEAK_FUNCTION_IMPL_NAME(gpio_debug_pins_init)() { } diff --git a/src/host/hardware_gpio/include/hardware/gpio.h b/src/host/hardware_gpio/include/hardware/gpio.h index 592a562a..154cf639 100644 --- a/src/host/hardware_gpio/include/hardware/gpio.h +++ b/src/host/hardware_gpio/include/hardware/gpio.h @@ -12,9 +12,11 @@ extern "C" { #endif #include "pico.h" +#include "hardware/irq.h" -enum gpio_function { +typedef enum gpio_function { GPIO_FUNC_XIP = 0, + GPIO_FUNC_XIP_CS1 = 0, GPIO_FUNC_SPI = 1, GPIO_FUNC_UART = 2, GPIO_FUNC_I2C = 3, @@ -24,7 +26,32 @@ enum gpio_function { GPIO_FUNC_PIO1 = 7, GPIO_FUNC_GPCK = 8, GPIO_FUNC_USB = 9, - GPIO_FUNC_NULL = 0xf, + GPIO_FUNC_HSTX = 10, + GPIO_FUNC_PIO2 = 11, + GPIO_FUNC_CORESIGHT_TRACE = 12, + GPIO_FUNC_UART_AUX = 13, + GPIO_FUNC_NULL = 0x1f, +}gpio_function_t; + +enum gpio_dir { + GPIO_OUT = 1u, ///< set GPIO to output + GPIO_IN = 0u, ///< set GPIO to input +}; + +enum gpio_irq_level { + GPIO_IRQ_LEVEL_LOW = 0x1u, ///< IRQ when the GPIO pin is a logical 0 + GPIO_IRQ_LEVEL_HIGH = 0x2u, ///< IRQ when the GPIO pin is a logical 1 + GPIO_IRQ_EDGE_FALL = 0x4u, ///< IRQ when the GPIO has transitioned from a logical 1 to a logical 0 + GPIO_IRQ_EDGE_RISE = 0x8u, ///< IRQ when the GPIO has transitioned from a logical 0 to a logical 1 +}; + +typedef void (*gpio_irq_callback_t)(uint gpio, uint32_t event_mask); + +enum gpio_override { + GPIO_OVERRIDE_NORMAL = 0, ///< peripheral signal selected via \ref gpio_set_function + GPIO_OVERRIDE_INVERT = 1, ///< invert peripheral signal selected via \ref gpio_set_function + GPIO_OVERRIDE_LOW = 2, ///< drive low/disable output + GPIO_OVERRIDE_HIGH = 3, ///< drive high/enable output }; enum gpio_slew_rate { @@ -39,25 +66,30 @@ enum gpio_drive_strength { GPIO_DRIVE_STRENGTH_12MA = 3 ///< 12 mA nominal drive strength }; -#define GPIO_OUT 1 -#define GPIO_IN 0 +void check_gpio_param(uint gpio); // ---------------------------------------------------------------------------- // Pad Controls + IO Muxing // ---------------------------------------------------------------------------- // Declarations for gpio.c -void gpio_set_function(uint gpio, enum gpio_function fn); +void gpio_set_function(uint gpio, gpio_function_t fn); +void gpio_set_function_masked(uint32_t gpio_mask, gpio_function_t fn); +void gpio_set_function_masked64(uint64_t gpio_mask, gpio_function_t fn); -enum gpio_function gpio_get_function(uint gpio); +gpio_function_t gpio_get_function(uint gpio); + +void gpio_set_pulls(uint gpio, bool up, bool down); void gpio_pull_up(uint gpio); +bool gpio_is_pulled_up(uint gpio); + void gpio_pull_down(uint gpio); -void gpio_disable_pulls(uint gpio); +bool gpio_is_pulled_down(uint gpio); -void gpio_set_pulls(uint gpio, bool up, bool down); +void gpio_disable_pulls(uint gpio); void gpio_set_irqover(uint gpio, uint value); @@ -67,7 +99,7 @@ void gpio_set_inover(uint gpio, uint value); void gpio_set_oeover(uint gpio, uint value); -void gpio_set_input_enabled(uint gpio, bool enable); +void gpio_set_input_enabled(uint gpio, bool enabled); void gpio_set_input_hysteresis_enabled(uint gpio, bool enabled); @@ -81,9 +113,41 @@ void gpio_set_drive_strength(uint gpio, enum gpio_drive_strength drive); enum gpio_drive_strength gpio_get_drive_strength(uint gpio); +void gpio_set_irq_enabled(uint gpio, uint32_t event_mask, bool enabled); + +void gpio_set_irq_callback(gpio_irq_callback_t callback); + +void gpio_set_irq_enabled_with_callback(uint gpio, uint32_t event_mask, bool enabled, gpio_irq_callback_t callback); + +void gpio_set_dormant_irq_enabled(uint gpio, uint32_t event_mask, bool enabled); + +uint32_t gpio_get_irq_event_mask(uint gpio); + +void gpio_acknowledge_irq(uint gpio, uint32_t event_mask); + +void gpio_add_raw_irq_handler_with_order_priority_masked(uint32_t gpio_mask, irq_handler_t handler, uint8_t order_priority); + +void gpio_add_raw_irq_handler_with_order_priority_masked64(uint64_t gpio_mask, irq_handler_t handler, uint8_t order_priority); + +void gpio_add_raw_irq_handler_with_order_priority(uint gpio, irq_handler_t handler, uint8_t order_priority); + +void gpio_add_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler); + +void gpio_add_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler); + +void gpio_add_raw_irq_handler(uint gpio, irq_handler_t handler); + +void gpio_remove_raw_irq_handler_masked(uint32_t gpio_mask, irq_handler_t handler); + +void gpio_remove_raw_irq_handler_masked64(uint64_t gpio_mask, irq_handler_t handler); + +void gpio_remove_raw_irq_handler(uint gpio, irq_handler_t handler); + // Configure a GPIO for direct input/output from software void gpio_init(uint gpio); +void gpio_deinit(uint gpio); + void gpio_init_mask(uint gpio_mask); // ---------------------------------------------------------------------------- @@ -94,7 +158,9 @@ void gpio_init_mask(uint gpio_mask); bool gpio_get(uint gpio); // Get raw value of all -uint32_t gpio_get_all(); +uint32_t gpio_get_all(void); + +uint64_t gpio_get_all64(void); // ---------------------------------------------------------------------------- // Output @@ -102,11 +168,17 @@ uint32_t gpio_get_all(); // Drive high every GPIO appearing in mask void gpio_set_mask(uint32_t mask); +void gpio_set_mask64(uint64_t mask); +void gpio_set_mask_n(uint n, uint32_t mask); void gpio_clr_mask(uint32_t mask); +void gpio_clr_mask64(uint64_t mask); +void gpio_clr_mask_n(uint n, uint32_t mask); // Toggle every GPIO appearing in mask void gpio_xor_mask(uint32_t mask); +void gpio_xor_mask64(uint64_t mask); +void gpio_xor_mask_n(uint n, uint32_t mask); // For each 1 bit in "mask", drive that pin to the value given by @@ -114,59 +186,96 @@ void gpio_xor_mask(uint32_t mask); // Since this uses the TOGL alias, it is concurrency-safe with e.g. an IRQ // bashing different pins from the same core. void gpio_put_masked(uint32_t mask, uint32_t value); +void gpio_put_masked64(uint64_t mask, uint64_t value); +void gpio_put_masked_n(uint n, uint32_t mask, uint32_t value); // Drive all pins simultaneously void gpio_put_all(uint32_t value); +void gpio_put_all64(uint64_t value); // Drive a single GPIO high/low void gpio_put(uint gpio, int value); +// Determine whether a GPIO is currently driven high or low +bool gpio_get_out_level(uint gpio); + // ---------------------------------------------------------------------------- // Direction // ---------------------------------------------------------------------------- // Switch all GPIOs in "mask" to output void gpio_set_dir_out_masked(uint32_t mask); +void gpio_set_dir_out_masked64(uint64_t mask); // Switch all GPIOs in "mask" to input void gpio_set_dir_in_masked(uint32_t mask); +void gpio_set_dir_in_masked64(uint64_t mask); // For each 1 bit in "mask", switch that pin to the direction given by // corresponding bit in "value", leaving other pins unchanged. // E.g. gpio_set_dir_masked(0x3, 0x2); -> set pin 0 to input, pin 1 to output, // simultaneously. void gpio_set_dir_masked(uint32_t mask, uint32_t value); +void gpio_set_dir_masked64(uint64_t mask, uint64_t value); // Set direction of all pins simultaneously. // For each bit in value, // 1 = out // 0 = in void gpio_set_dir_all_bits(uint32_t value); +void gpio_set_dir_all_bits64(uint64_t values); // Set a single GPIO to input/output. // true = out // 0 = in void gpio_set_dir(uint gpio, bool out); -// debugging -#ifndef PICO_DEBUG_PIN_BASE -#define PICO_DEBUG_PIN_BASE 19u +// Check if a specific GPIO direction is OUT +bool gpio_is_dir_out(uint gpio); + +// Get a specific GPIO direction +// 1 = out +// 0 = in +uint gpio_get_dir(uint gpio); + +#if PICO_SECURE +void gpio_assign_to_ns(uint gpio, bool ns); #endif - -// note these two macros may only be used once per compilation unit -#define CU_REGISTER_DEBUG_PINS(p, ...) -#define CU_SELECT_DEBUG_PINS(x) -#define DEBUG_PINS_ENABLED(p) false - -#define DEBUG_PINS_SET(p, v) ((void)0) -#define DEBUG_PINS_CLR(p, v) ((void)0) -#define DEBUG_PINS_XOR(p, v) ((void)0) - -void gpio_debug_pins_init(); +extern void gpio_debug_pins_init(void); #ifdef __cplusplus } #endif + +// PICO_CONFIG: PICO_DEBUG_PIN_BASE, First pin to use for debug output (if enabled), min=0, max=31 on RP2350B, 29 otherwise, default=19, group=hardware_gpio +#ifndef PICO_DEBUG_PIN_BASE +#define PICO_DEBUG_PIN_BASE 19u +#endif + +// PICO_CONFIG: PICO_DEBUG_PIN_COUNT, Number of pins to use for debug output (if enabled), min=1, max=32 on RP2350B, 30 otherwise, default=3, group=hardware_gpio +#ifndef PICO_DEBUG_PIN_COUNT +#define PICO_DEBUG_PIN_COUNT 3u +#endif + +#ifndef __cplusplus +// note these two macros may only be used once per and only apply per compilation unit (hence the CU_) +#define CU_REGISTER_DEBUG_PINS(...) enum __unused DEBUG_PIN_TYPE { _none = 0, __VA_ARGS__ }; static enum DEBUG_PIN_TYPE __selected_debug_pins; +#define CU_SELECT_DEBUG_PINS(x) static enum DEBUG_PIN_TYPE __selected_debug_pins = (x); +#define DEBUG_PINS_ENABLED(p) (__selected_debug_pins == (p)) +#else +#define CU_REGISTER_DEBUG_PINS(p...) \ + enum DEBUG_PIN_TYPE { _none = 0, p }; \ + template class __debug_pin_settings { \ + public: \ + static inline bool enabled() { return false; } \ + }; +#define CU_SELECT_DEBUG_PINS(x) template<> inline bool __debug_pin_settings::enabled() { return true; }; +#define DEBUG_PINS_ENABLED(p) (__debug_pin_settings

::enabled()) +#endif +#define DEBUG_PINS_SET(p, v) if (DEBUG_PINS_ENABLED(p)) gpio_set_mask((unsigned)(v)<= 2 * PICO_UNIQUE_BOARD_ID_SIZE_BYTES + 1 + */ +void pico_get_unique_board_id_string(char *id_out, uint len); + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/host/pico_unique_id/unique_id.c b/src/host/pico_unique_id/unique_id.c new file mode 100644 index 00000000..57792619 --- /dev/null +++ b/src/host/pico_unique_id/unique_id.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "pico/unique_id.h" + +PICO_WEAK_FUNCTION_DEF(pico_get_unique_board_id) +void PICO_WEAK_FUNCTION_IMPL_NAME(pico_get_unique_board_id)(pico_unique_board_id_t *id_out) { + for (int i = 0; i < PICO_UNIQUE_BOARD_ID_SIZE_BYTES; i++) { + id_out->id[i] = 0xa0 + i; + } +} + +PICO_WEAK_FUNCTION_DEF(pico_get_unique_board_id_string) +void PICO_WEAK_FUNCTION_IMPL_NAME(pico_get_unique_board_id_string)(char *id_out, uint len) { + assert(len > 0); + size_t i; + + pico_unique_board_id_t id; + pico_get_unique_board_id(&id); + + // Generate hex one nibble at a time + for (i = 0; (i < len - 1) && (i < PICO_UNIQUE_BOARD_ID_SIZE_BYTES * 2); i++) { + int nibble = (id.id[i/2] >> (4 - 4 * (i&1))) & 0xf; + id_out[i] = (char)(nibble < 10 ? nibble + '0' : nibble + 'A' - 10); + } + id_out[i] = 0; +} diff --git a/src/rp2_common/hardware_pio/include/hardware/pio.h b/src/rp2_common/hardware_pio/include/hardware/pio.h index 4363608f..4dc000cc 100644 --- a/src/rp2_common/hardware_pio/include/hardware/pio.h +++ b/src/rp2_common/hardware_pio/include/hardware/pio.h @@ -1899,7 +1899,7 @@ void pio_sm_set_pins_with_mask64(PIO pio, uint sm, uint64_t pin_values, uint64_t * \param pio The PIO instance; e.g. \ref pio0 or \ref pio1 * \param sm State machine index (0..3) to use * \param pin_dirs the pin directions to set - 1 = out, 0 = in (if the corresponding bit in pin_mask is set) - * \param pin_mask a bit for each pin to indicate whether the corresponding pin_value for that pin should be applied. + * \param pin_mask a bit for each pin to indicate whether the corresponding pin_dir for that pin should be applied. */ void pio_sm_set_pindirs_with_mask(PIO pio, uint sm, uint32_t pin_dirs, uint32_t pin_mask); @@ -1914,7 +1914,7 @@ void pio_sm_set_pindirs_with_mask(PIO pio, uint sm, uint32_t pin_dirs, uint32_t * \param pio The PIO instance; e.g. \ref pio0 or \ref pio1 * \param sm State machine index (0..3) to use * \param pin_dirs the pin directions to set - 1 = out, 0 = in (if the corresponding bit in pin_mask is set) - * \param pin_mask a bit for each pin to indicate whether the corresponding pin_value for that pin should be applied. + * \param pin_mask a bit for each pin to indicate whether the corresponding pin_dir for that pin should be applied. */ void pio_sm_set_pindirs_with_mask64(PIO pio, uint sm, uint64_t pin_dirs, uint64_t pin_mask); diff --git a/src/rp2_common/hardware_pio/include/hardware/pio_instructions.h b/src/rp2_common/hardware_pio/include/hardware/pio_instructions.h index 85804f95..8144e8d2 100644 --- a/src/rp2_common/hardware_pio/include/hardware/pio_instructions.h +++ b/src/rp2_common/hardware_pio/include/hardware/pio_instructions.h @@ -310,6 +310,23 @@ static inline uint pio_encode_wait_irq(bool polarity, bool relative, uint irq) { return _pio_encode_instr_and_args(pio_instr_bits_wait, 2u | (polarity ? 4u : 0u), _pio_encode_irq(relative, irq)); } +#if PICO_PIO_VERSION > 0 +/*! \brief Encode a WAIT for jmppin instruction + * \ingroup pio_instructions + * + * This is the equivalent of `WAIT JMPPIN + ` + * + * \param polarity true for `WAIT 1`, false for `WAIT 0` + * \param offset The pin offset 0-3 relative to the executing SM's jmp pin mapping + * \return The instruction encoding with 0 delay and no side set value + * \see pio_encode_delay, pio_encode_sideset, pio_encode_sideset_opt + */ +static inline uint pio_encode_wait_jmppin(bool polarity, uint offset) { + valid_params_if(PIO_INSTRUCTIONS, offset <= 4); + return _pio_encode_instr_and_args(pio_instr_bits_wait, 3u | (polarity ? 4u : 0u), offset); +} +#endif + /*! \brief Encode an IN instruction * \ingroup pio_instructions * diff --git a/src/rp2_common/hardware_sync/include/hardware/sync.h b/src/rp2_common/hardware_sync/include/hardware/sync.h index 14a86c88..270d12b5 100644 --- a/src/rp2_common/hardware_sync/include/hardware/sync.h +++ b/src/rp2_common/hardware_sync/include/hardware/sync.h @@ -372,8 +372,8 @@ bool spin_lock_is_claimed(uint lock_num); #define remove_volatile_cast(t, x) (t)(x) #define remove_volatile_cast_no_barrier(t, x) (t)(x) #else -#define remove_volatile_cast(t, x) ({__compiler_memory_barrier(); Clang_Pragma("clang diagnostic push"); Clang_Pragma("clang diagnostic ignored \"-Wcast-qual\""); (t)(x); Clang_Pragma("clang diagnostic pop"); }) -#define remove_volatile_cast_no_barrier(t, x) ({ Clang_Pragma("clang diagnostic push"); Clang_Pragma("clang diagnostic ignored \"-Wcast-qual\""); (t)(x); Clang_Pragma("clang diagnostic pop"); }) +#define remove_volatile_cast(t, x) (__compiler_memory_barrier(), Clang_Pragma("clang diagnostic push") Clang_Pragma("clang diagnostic ignored \"-Wcast-qual\"") (t)(x) Clang_Pragma("clang diagnostic pop")) +#define remove_volatile_cast_no_barrier(t, x) Clang_Pragma("clang diagnostic push") Clang_Pragma("clang diagnostic ignored \"-Wcast-qual\"") (t)(x) Clang_Pragma("clang diagnostic pop") #endif #ifdef __cplusplus diff --git a/src/rp2_common/hardware_timer/include/hardware/timer.h b/src/rp2_common/hardware_timer/include/hardware/timer.h index b2696408..14a46c5a 100644 --- a/src/rp2_common/hardware_timer/include/hardware/timer.h +++ b/src/rp2_common/hardware_timer/include/hardware/timer.h @@ -157,7 +157,7 @@ static_assert(TIMER1_IRQ_3 == TIMER0_IRQ_0 + 7, ""); * On RP2040 this must be 0 as there is only one timer instance * \endif * \if rp2350_specific - * On RP2040 this may be set to 0 or 1 + * On RP2350 this may be set to 0 or 1 * \endif */ #ifndef PICO_DEFAULT_TIMER diff --git a/src/rp2_common/pico_async_context/async_context_freertos.c b/src/rp2_common/pico_async_context/async_context_freertos.c index f6b1a5a1..6bc7c460 100644 --- a/src/rp2_common/pico_async_context/async_context_freertos.c +++ b/src/rp2_common/pico_async_context/async_context_freertos.c @@ -226,7 +226,7 @@ static void handle_sync_func_call(async_context_t *context, async_when_pending_w xSemaphoreGive(call->sem); } -uint32_t async_context_freertos_execute_sync(async_context_t *self_base, uint32_t (*func)(void *param), void *param) { +static uint32_t async_context_freertos_execute_sync(async_context_t *self_base, uint32_t (*func)(void *param), void *param) { async_context_freertos_t *self = (async_context_freertos_t*)self_base; hard_assert(xSemaphoreGetMutexHolder(self->lock_mutex) != xTaskGetCurrentTaskHandle()); sync_func_call_t call = {0}; diff --git a/src/rp2_common/pico_async_context/async_context_poll.c b/src/rp2_common/pico_async_context/async_context_poll.c index 47991b40..c82152a2 100644 --- a/src/rp2_common/pico_async_context/async_context_poll.c +++ b/src/rp2_common/pico_async_context/async_context_poll.c @@ -51,7 +51,7 @@ static void async_context_poll_lock_check(async_context_t *self_base) { } } -uint32_t async_context_poll_execute_sync(__unused async_context_t *context, uint32_t (*func)(void *param), void *param) { +static uint32_t async_context_poll_execute_sync(__unused async_context_t *context, uint32_t (*func)(void *param), void *param) { return func(param); } diff --git a/src/rp2_common/pico_async_context/async_context_threadsafe_background.c b/src/rp2_common/pico_async_context/async_context_threadsafe_background.c index 16571eba..dd5efa02 100644 --- a/src/rp2_common/pico_async_context/async_context_threadsafe_background.c +++ b/src/rp2_common/pico_async_context/async_context_threadsafe_background.c @@ -135,7 +135,7 @@ static void lock_release(async_context_threadsafe_background_t *self) { #endif } -uint32_t async_context_threadsafe_background_execute_sync(async_context_t *self_base, uint32_t (*func)(void *param), void *param) { +static uint32_t async_context_threadsafe_background_execute_sync(async_context_t *self_base, uint32_t (*func)(void *param), void *param) { async_context_threadsafe_background_t *self = (async_context_threadsafe_background_t*)self_base; #if ASYNC_CONTEXT_THREADSAFE_BACKGROUND_MULTI_CORE if (self_base->core_num != get_core_num()) { diff --git a/src/rp2_common/pico_clib_interface/include/llvm_libc/time.h b/src/rp2_common/pico_clib_interface/include/llvm_libc/time.h index bb37c7ef..7b6e7e75 100644 --- a/src/rp2_common/pico_clib_interface/include/llvm_libc/time.h +++ b/src/rp2_common/pico_clib_interface/include/llvm_libc/time.h @@ -14,7 +14,7 @@ __BEGIN_C_DECLS -struct tm* localtime_r(const time_t* timer, struct tm* buf); +struct tm* localtime_r(const time_t* timer, struct tm* buf) __NOEXCEPT; __END_C_DECLS diff --git a/src/rp2_common/pico_crt0/embedded_start_block.inc.S b/src/rp2_common/pico_crt0/embedded_start_block.inc.S index ace7d3b1..93114ddd 100644 --- a/src/rp2_common/pico_crt0/embedded_start_block.inc.S +++ b/src/rp2_common/pico_crt0/embedded_start_block.inc.S @@ -1,10 +1,12 @@ -#if !defined(PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM) +// PICO_CONFIG: PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM, Include an image type item in the metadata block, default=0 on RP2040, 1 otherwise, type=bool, group=pico_crt0 +#ifndef PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM // todo decide whether we want this item for RP2040 by default, probably not (there are a zilloon binaries out there without it) #if !PICO_RP2040 #define PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM 1 #endif #endif +// PICO_CONFIG: PICO_CRT0_INCLUDE_PICOBIN_VECTOR_TABLE_ITEM, Include a vector table item in the metadata block, default=1 for no_flash binaries, 0 otherwise or on RP2040, type=bool, group=pico_crt0 #ifndef PICO_CRT0_INCLUDE_PICOBIN_VECTOR_TABLE_ITEM // If no_flash bin, then include a vector table item #if PICO_NO_FLASH && !PICO_RP2040 @@ -12,6 +14,7 @@ #endif #endif +// PICO_CONFIG: PICO_CRT0_INCLUDE_PICOBIN_ENTRY_POINT_ITEM, Include an entry point item in the metadata block, default=1 for Risc-V, 0 otherwise, type=bool, group=pico_crt0 #ifndef PICO_CRT0_INCLUDE_PICOBIN_ENTRY_POINT_ITEM // On RISC-V the default entry point from bootrom is the start of the binary, but // we have our vtable at the start, so we must include an entry point @@ -20,22 +23,64 @@ #endif #endif +// PICO_CONFIG: PICO_CRT0_INCLUDE_PICOBIN_BLOCK, Include a metadata block at the start of the image, default=PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM, type=bool, group=pico_crt0 #ifndef PICO_CRT0_INCLUDE_PICOBIN_BLOCK #define PICO_CRT0_INCLUDE_PICOBIN_BLOCK PICO_CRT0_INCLUDE_PICOBIN_IMAGE_TYPE_ITEM #endif +// PICO_CONFIG: PICO_CRT0_INCLUDE_PICOBIN_END_BLOCK, Include a metadata block at the end of the image, default=1 for flash binaries with a metadata block at the start, type=bool, group=pico_crt0 #ifndef PICO_CRT0_INCLUDE_PICOBIN_END_BLOCK #define PICO_CRT0_INCLUDE_PICOBIN_END_BLOCK (PICO_CRT0_INCLUDE_PICOBIN_BLOCK && !PICO_NO_FLASH) #endif +// PICO_CONFIG: PICO_CRT0_IMAGE_TYPE_TBYB, Set the TBYB flag for the IMAGE_DEF which requires a flash update boot to boot it, default=0, type=bool, group=pico_crt0 +#ifndef PICO_CRT0_IMAGE_TYPE_TBYB +#define PICO_CRT0_IMAGE_TYPE_TBYB 0 +#endif + #if PICO_CRT0_IMAGE_TYPE_TBYB #define CRT0_TBYB_FLAG PICOBIN_IMAGE_TYPE_EXE_TBYB_BITS #else #define CRT0_TBYB_FLAG 0 #endif +// PICO_CONFIG: PICO_CRT0_VERSION_MAJOR, The major version for the metadata block (ignored if 0), default=0, type=int, group=pico_crt0 +// PICO_CONFIG: PICO_CRT0_VERSION_MINOR, The minor version for the metadata block (ignored if 0), default=0, type=int, group=pico_crt0 #if defined(PICO_CRT0_VERSION_MINOR) && !defined(PICO_CRT0_VERSION_MAJOR) #define PICO_CRT0_VERSION_MAJOR 0 +#elif defined(PICO_CRT0_VERSION_MAJOR) && !defined(PICO_CRT0_VERSION_MINOR) +#define PICO_CRT0_VERSION_MINOR 0 +#endif + +// PICO_CONFIG: PICO_CRT0_IMAGE_TYPE_ITEM_VALUE, The IMAGE_TYPE value for the IMAGE_DEF, default=matching the PICO_PLATFORM, type=int, group=pico_crt0 +#ifndef PICO_CRT0_IMAGE_TYPE_ITEM_VALUE +#if defined(__riscv) +#define PICO_CRT0_IMAGE_TYPE_ITEM_VALUE \ + PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ + PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(RISCV) | \ + PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ + CRT0_TBYB_FLAG +#elif PICO_RP2040 +#define PICO_CRT0_IMAGE_TYPE_ITEM_VALUE \ + PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ + PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(NS) | \ + PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ + PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2040) | \ + CRT0_TBYB_FLAG +#elif PICO_NONSECURE +.hword PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ + PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(NS) | \ + PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ + PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ + CRT0_TBYB_FLAG +#else +#define PICO_CRT0_IMAGE_TYPE_ITEM_VALUE \ + PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ + PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(S) | \ + PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ + PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ + CRT0_TBYB_FLAG +#endif #endif #if PICO_CRT0_INCLUDE_PICOBIN_BLOCK @@ -49,32 +94,7 @@ embedded_block: // for booting the binary with a known type. .byte PICOBIN_BLOCK_ITEM_1BS_IMAGE_TYPE .byte 0x1 // 1 word -#ifdef PICO_CRT0_IMAGE_TYPE_ITEM_VALUE .hword PICO_CRT0_IMAGE_TYPE_ITEM_VALUE -#elif defined(__riscv) -.hword PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ - PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(RISCV) | \ - PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ - CRT0_TBYB_FLAG -#elif PICO_RP2040 -.hword PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ - PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(NS) | \ - PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ - PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2040) | \ - CRT0_TBYB_FLAG -#elif PICO_NONSECURE -.hword PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ - PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(NS) | \ - PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ - PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ - CRT0_TBYB_FLAG -#else -.hword PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(EXE) | \ - PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(S) | \ - PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(ARM) | \ - PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(RP2350) | \ - CRT0_TBYB_FLAG -#endif #else // if no image type, then add ignored item .byte PICOBIN_BLOCK_ITEM_2BS_IGNORED @@ -86,11 +106,7 @@ embedded_block: .byte PICOBIN_BLOCK_ITEM_1BS_VERSION .byte 0x2 // 2 words .hword 0 -#ifdef PICO_CRT0_VERSION_MINOR .hword PICO_CRT0_VERSION_MINOR -#else -.hword 0 -#endif .hword PICO_CRT0_VERSION_MAJOR #endif diff --git a/src/rp2_common/pico_multicore/include/pico/multicore.h b/src/rp2_common/pico_multicore/include/pico/multicore.h index fe198aed..6c997cb8 100644 --- a/src/rp2_common/pico_multicore/include/pico/multicore.h +++ b/src/rp2_common/pico_multicore/include/pico/multicore.h @@ -377,7 +377,7 @@ static inline void multicore_doorbell_clear_current_core(uint doorbell_num) { sio_hw->doorbell_in_clr = 1u << doorbell_num; } -/*! \brief Determine if the given doorbell is active on the other core +/*! \brief Determine if the given doorbell is active on this core * \ingroup multicore_doorbell * \param doorbell_num the doorbell number */ @@ -386,7 +386,7 @@ static inline bool multicore_doorbell_is_set_current_core(uint doorbell_num) { return sio_hw->doorbell_in_set & (1u << doorbell_num); } -/*! \brief Determine if the given doorbell is active on the this core +/*! \brief Determine if the given doorbell is active on the other core * \ingroup multicore_doorbell * \param doorbell_num the doorbell number */ diff --git a/src/rp2_common/pico_multicore/multicore.c b/src/rp2_common/pico_multicore/multicore.c index e1159508..453d770b 100644 --- a/src/rp2_common/pico_multicore/multicore.c +++ b/src/rp2_common/pico_multicore/multicore.c @@ -367,7 +367,7 @@ static inline void clear_claimed_bit(uint8_t *bits, uint bit_index) { static bool multicore_doorbell_claim_under_lock(uint doorbell_num, uint core_mask, bool required) { static_assert(NUM_CORES == 2, ""); uint claimed_cores_for_doorbell = (uint) (is_bit_claimed(doorbell_claimed[0], doorbell_num) | - (is_bit_claimed(doorbell_claimed[1], doorbell_num + 1u) << 1)); + (is_bit_claimed(doorbell_claimed[1], doorbell_num) << 1)); if (claimed_cores_for_doorbell & core_mask) { if (required) { panic( "Multicore doorbell %d already claimed on core mask 0x%x; requested core mask 0x%x\n", diff --git a/src/rp2_common/pico_status_led/include/pico/status_led.h b/src/rp2_common/pico_status_led/include/pico/status_led.h index 4870bc9b..46df5743 100644 --- a/src/rp2_common/pico_status_led/include/pico/status_led.h +++ b/src/rp2_common/pico_status_led/include/pico/status_led.h @@ -57,7 +57,7 @@ extern "C" { #define PICO_COLORED_STATUS_LED_USES_WRGB 0 #endif -/*! \brief Generate an RGB color value for /ref colored_status_led_set_on_with_color +/*! \brief Generate an RGB color value for \ref colored_status_led_set_on_with_color * \ingroup pico_status_led */ #ifndef PICO_COLORED_STATUS_LED_COLOR_FROM_RGB diff --git a/test/pico_test/include/pico/test.h b/test/pico_test/include/pico/test.h index b444a95b..c4fc028e 100644 --- a/test/pico_test/include/pico/test.h +++ b/test/pico_test/include/pico/test.h @@ -39,11 +39,13 @@ but not sure that is implemented yet. #define PICOTEST_CHECK_AND_ABORT(COND, MESSAGE) if (!(COND)) { \ printf("Module %s: %s\n", picotest_module, MESSAGE); \ + picotest_error_code = -1; \ return -1; \ } #define PICOTEST_CHECK_CHANNEL_AND_ABORT(CHANNEL, COND, MESSAGE) if (!(COND)) { \ printf("Module %s, channel %d: %s\n", picotest_module, CHANNEL, MESSAGE); \ + picotest_error_code = -1; \ return -1; \ }