Markus Stockhausen fdc3776068 realtek: pcs: fix PLL_CML_CTRL for serdes 0/1 ... Setup of register PLL_CML_CTRL has two issues. - It clears out bits 4-31 due to a wrong mask - Setup of bits 0-3 is not generic but depends on the mode of serdes 0/1 Fix that by relocating the code and adapting the mask. The error exists for longer but it has survived the pcs refactoring. Thus blame the corresponding refactoring commit. Fixes: b670d48 ("realtek: pcs: rtl838x: refactor imported code") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/21956 Signed-off-by: Robert Marko <robimarko@gmail.com>		2026-02-12 16:58:46 +01:00
..
imagebuilder	build: use STAGING_DIR for special APK package versions	2026-02-01 11:16:54 +01:00
linux	realtek: pcs: fix PLL_CML_CTRL for serdes 0/1	2026-02-12 16:58:46 +01:00
llvm-bpf
sdk	sdk: use GIT_COMMIT for buildbot SDK	2025-12-04 19:20:55 +01:00
toolchain
Config.in	targets: add USES_PM auto-feature	2025-07-20 12:16:13 +01:00
Makefile