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f2699cce13
- Fix RTL8261N 10GbE PHY `reset-deassert-us` from 100ms to 221ms to meet datasheet minimum SMI-ready timing (t7 >= 150ms), fixing intermittent boot stalls caused by MDIO bus instability - Add missing WLAN toggle button (GPIO 34) present in stock firmware but absent from OpenWrt DTS - Fix memory size from 1 GB to the actual 512 MB Fix 1: The RTL8261N 10GbE PHY's `reset-deassert-us` was set to 100ms (100000us), but the **RTL8261N datasheet (Table 108, parameter t7)** specifies a minimum **SMI-ready time of 150ms** after nRESET release before the MDIO (SMI) bus can be used. With only 100ms, the kernel attempts MDIO bus access before the RTL8261N's SMI interface is stable. Since the RTL8261N (mdio-bus:00) and the internal MT7988 2.5GbE PHY (mdio-bus:0f) share the same MDIO bus, a not-yet-ready RTL8261N disrupts all MDIO traffic, causing the 2.5GbE PHY firmware loading (`mt798x_2p5ge_phy_config_init`) to stall. Observed symptoms on warm reboot: - Sometimes `mt798x_2p5ge_phy_config_init` hangs for 5+ minutes or indefinitely - RCU CPU stalls (`rcu: INFO: rcu_sched detected stalls on CPUs`) - mt7996e WiFi chip message timeouts cascading to `chip full reset failed` - System appears hung with only power LED blinking slowly UART serial log evidence (warm reboot with 100ms): ``` [ 73.041756] rcu: INFO: rcu_sched self-detected stall on CPU [ 73.048341] rcu: 2-....: (8 ticks this GP) [ 73.061641] pc : mt798x_2p5ge_phy_config_init+0x258/0xbb0 [ 73.061653] lr : mt798x_2p5ge_phy_config_init+0x238/0xbb0 ... [ 334.771280] MediaTek MT7988 2.5GbE PHY mdio-bus:0f: Firmware date code: 2024/10/30 ``` The 2.5GbE PHY firmware loading, which normally takes ~3 seconds, took **325 seconds** due to MDIO bus instability. In the worst case, the system never recovers. GPL DTS uses 221ms (`reset-deassert-us = <221000>`), providing 71ms of margin above the 150ms datasheet minimum. All MediaTek MT7988 reference board DTS files in the GPL use this same 221ms value. Fix 2: Missing WLAN button (GPIO 34) The BE450 has a physical WLAN toggle button on GPIO 34, defined in the stock TP-Link GPL DTS but missing from the OpenWrt DTS. Without this definition, the button is non-functional under OpenWrt. The pin name for GPIO 34 in the MT7988 pinctrl is `SPI2_MISO`, confirmed by the kernel pinctrl driver (`pinctrl-mt7988.c`: `MT7988_PIN(34, "SPI2_MISO")`) and the official devicetree binding (`mediatek,mt7988-pinctrl.yaml`). Note: GPIO 34 is also used by the BE450's First U-Boot as a recovery button (web recovery 192.168.1.1). Registering it in the DTS ensures the kernel claims the pin. Fix 3: Incorrect memory size in DTS The OpenWrt DTS declares 1 GB (`0x40000000`) of RAM, but the BE450 has 512 MB (`0x20000000`). Run tested. Signed-off-by: Semih Baskan <strst.gs@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22386 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> |
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