Martin Blumenstingl 2683cca592 lantiq: dts: vr9: Add missing properties to the CPU port on the switch ... The CPU port should define the phy-mode and and a PHY phandle or fixed-link to indicate how the CPU port is connected to the SoC's Ethernet controller. On xRX200 this is all internal connection, so use phy-mode = "internal" along with a fixed-link that matches the definition inside &eth0. Linux 6.0 shows a warning since upstream commit e09e9873152e3f ("net: dsa: make phylink-related OF properties mandatory on DSA and CPU ports"). when these properties are missing. Adding the properties before OpenWrt is updated to Linux 6.0 is harmless. Suggested-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>		2022-10-10 21:51:05 +02:00
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imagebuilder	imagebuilder: export SOURCE_DATE_EPOCH to environment	2022-04-10 00:56:38 +01:00
linux	lantiq: dts: vr9: Add missing properties to the CPU port on the switch	2022-10-10 21:51:05 +02:00
llvm-bpf	llvm-bpf: fix rebuild check for generating tarball	2021-11-26 11:37:19 +01:00
sdk	build: fix warnings from grep	2022-09-28 17:17:48 +02:00
toolchain	toolchain: switch packaged toolchain to tar.xz	2021-10-21 08:25:38 -10:00
Config.in	base-files: add eMMC sysupgrade support	2021-12-02 20:42:58 +00:00
Makefile	tools/llvm-bpf: move tarball packing to target/llvm-bpf	2021-11-22 12:00:40 +01:00