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6879c8ea53
There is some special logic used for certain writes to digital pages for RTL93xx SerDes, especially when configuring the XSGMII mode. For RTL930x this applies to SerDes 2 and 3, for RTL93xx to more. In this case, a dual-read/write to SDS and SDS + 1 is done. While the corresponding mapping from front to back SDS for RTL931x is currently covered in the SerDes MDIO driver, it isn't for RTL930x. To cover these special cases and provide a clear interface on that, introduce an XSG write SerDes operation. All these dual-read/write cases can be expressed with such an XSG operation whose internal semantics are defined for each switchcore family. This could be done just with plain dual read/write calls however this isn't a clean approach and may be confusing while comparing our functionality with the SDK, especially for RTL930x. In practice, if this isn't handled correctly, only half of the ports of an XSGMII-connected RTL8218D do work because some required values aren't applied for the background SerDes 3. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21592 Signed-off-by: Robert Marko <robimarko@gmail.com> |
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| .. | ||
| base-files | ||
| dts | ||
| files/firmware/rtl838x_phy | ||
| files-6.12 | ||
| image | ||
| patches-6.12 | ||
| profiles | ||
| rtl838x | ||
| rtl839x | ||
| rtl930x | ||
| rtl930x_nand | ||
| rtl931x | ||
| rtl931x_nand | ||
| Makefile | ||