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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
66 lines
2.4 KiB
Diff
66 lines
2.4 KiB
Diff
From 2eaa23a57b91442f98ae2c77ab1258a2bf0065b9 Mon Sep 17 00:00:00 2001
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From: Alexander Dahl <ada@thorsis.com>
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Date: Thu, 9 Jan 2025 10:48:43 +0100
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Subject: [PATCH 101/112] spi: atmel-quadspi: Update to current device naming
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terminology
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For v6.9 the spi subsystem changed the terminology to host and target
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devices, see commit 99769a52464d ("spi: Update the "master/slave"
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terminology in documentation") for reference. Support for SAMA7G5 was
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forward ported recently from an old vendor branch before that
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terminology change, so naming for the new struct member is adapted to
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follow the current scheme.
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Signed-off-by: Alexander Dahl <ada@thorsis.com>
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Link: https://patch.msgid.link/20250109094843.36014-1-ada@thorsis.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/atmel-quadspi.c | 12 ++++++------
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1 file changed, 6 insertions(+), 6 deletions(-)
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--- a/drivers/spi/atmel-quadspi.c
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+++ b/drivers/spi/atmel-quadspi.c
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@@ -280,7 +280,7 @@ struct atmel_qspi {
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u32 irq_mask;
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u32 mr;
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u32 scr;
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- u32 slave_max_speed_hz;
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+ u32 target_max_speed_hz;
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struct completion cmd_completion;
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struct completion dma_completion;
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dma_addr_t mmap_phys_base;
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@@ -1041,7 +1041,7 @@ static int atmel_qspi_set_pad_calibratio
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/* Refresh analogic blocks every 1 ms.*/
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atmel_qspi_write(FIELD_PREP(QSPI_REFRESH_DELAY_COUNTER,
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- aq->slave_max_speed_hz / 1000),
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+ aq->target_max_speed_hz / 1000),
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aq, QSPI_REFRESH);
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return ret;
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@@ -1064,12 +1064,12 @@ static int atmel_qspi_set_gclk(struct at
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return ret;
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}
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- if (aq->slave_max_speed_hz > QSPI_DLLCFG_THRESHOLD_FREQ)
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+ if (aq->target_max_speed_hz > QSPI_DLLCFG_THRESHOLD_FREQ)
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atmel_qspi_write(QSPI_DLLCFG_RANGE, aq, QSPI_DLLCFG);
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else
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atmel_qspi_write(0, aq, QSPI_DLLCFG);
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- ret = clk_set_rate(aq->gclk, aq->slave_max_speed_hz);
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+ ret = clk_set_rate(aq->gclk, aq->target_max_speed_hz);
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if (ret) {
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dev_err(&aq->pdev->dev, "Failed to set generic clock rate.\n");
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return ret;
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@@ -1131,8 +1131,8 @@ static int atmel_qspi_sama7g5_setup(stru
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{
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struct atmel_qspi *aq = spi_controller_get_devdata(spi->controller);
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- /* The controller can communicate with a single slave. */
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- aq->slave_max_speed_hz = spi->max_speed_hz;
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+ /* The controller can communicate with a single peripheral device (target). */
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+ aq->target_max_speed_hz = spi->max_speed_hz;
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return atmel_qspi_sama7g5_init(aq);
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}
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