openwrt/target/linux/microchipsw/patches-6.12/0080-v6.14-spi-atmel-quadspi-Use-devm_-clock-management.patch
Robert Marko 88a404a2d1
microchipsw: add support for Microchip LAN969x switches
Add a new microchipsw target aimed add supporting Microchip switch
SoC-s.

Start by supporting LAN969x SoC-s as the first subtarget.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2025-12-03 12:13:17 +01:00

131 lines
3.8 KiB
Diff

From 7c8bec1bb999e6f44e326fdf7157d5e37b748aca Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bence=20Cs=C3=B3k=C3=A1s?= <csokas.bence@prolan.hu>
Date: Thu, 19 Dec 2024 15:28:51 +0100
Subject: [PATCH 100/112] spi: atmel-quadspi: Use devm_ clock management
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Clean up error handling by using the new devm_
clock handling functions. This should make it
easier to add new code, as we can eliminate the
"goto ladder" in probe().
Signed-off-by: Bence Csókás <csokas.bence@prolan.hu>
Link: https://patch.msgid.link/20241219142851.430959-1-csokas.bence@prolan.hu
Signed-off-by: Mark Brown <broonie@kernel.org>
---
drivers/spi/atmel-quadspi.c | 42 ++++++++++---------------------------
1 file changed, 11 insertions(+), 31 deletions(-)
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -1365,50 +1365,37 @@ static int atmel_qspi_probe(struct platf
aq->mmap_phys_base = (dma_addr_t)res->start;
/* Get the peripheral clock */
- aq->pclk = devm_clk_get(&pdev->dev, "pclk");
+ aq->pclk = devm_clk_get_enabled(&pdev->dev, "pclk");
if (IS_ERR(aq->pclk))
- aq->pclk = devm_clk_get(&pdev->dev, NULL);
+ aq->pclk = devm_clk_get_enabled(&pdev->dev, NULL);
if (IS_ERR(aq->pclk))
return dev_err_probe(&pdev->dev, PTR_ERR(aq->pclk),
"missing peripheral clock\n");
- /* Enable the peripheral clock */
- err = clk_prepare_enable(aq->pclk);
- if (err)
- return dev_err_probe(&pdev->dev, err,
- "failed to enable the peripheral clock\n");
-
if (aq->caps->has_qspick) {
/* Get the QSPI system clock */
- aq->qspick = devm_clk_get(&pdev->dev, "qspick");
+ aq->qspick = devm_clk_get_enabled(&pdev->dev, "qspick");
if (IS_ERR(aq->qspick)) {
dev_err(&pdev->dev, "missing system clock\n");
err = PTR_ERR(aq->qspick);
- goto disable_pclk;
+ return err;
}
- /* Enable the QSPI system clock */
- err = clk_prepare_enable(aq->qspick);
- if (err) {
- dev_err(&pdev->dev,
- "failed to enable the QSPI system clock\n");
- goto disable_pclk;
- }
} else if (aq->caps->has_gclk) {
/* Get the QSPI generic clock */
aq->gclk = devm_clk_get(&pdev->dev, "gclk");
if (IS_ERR(aq->gclk)) {
dev_err(&pdev->dev, "missing Generic clock\n");
err = PTR_ERR(aq->gclk);
- goto disable_pclk;
+ return err;
}
}
if (aq->caps->has_dma) {
err = atmel_qspi_dma_init(ctrl);
if (err == -EPROBE_DEFER)
- goto disable_qspick;
+ return err;
}
/* Request the IRQ */
@@ -1448,10 +1435,6 @@ static int atmel_qspi_probe(struct platf
dma_release:
if (aq->caps->has_dma)
atmel_qspi_dma_release(aq);
-disable_qspick:
- clk_disable_unprepare(aq->qspick);
-disable_pclk:
- clk_disable_unprepare(aq->pclk);
return err;
}
@@ -1490,7 +1473,6 @@ static int atmel_qspi_sama7g5_suspend(st
if (ret)
return ret;
- clk_disable_unprepare(aq->pclk);
return 0;
}
@@ -1515,8 +1497,6 @@ static void atmel_qspi_remove(struct pla
}
atmel_qspi_write(QSPI_CR_QSPIDIS, aq, QSPI_CR);
- clk_disable(aq->qspick);
- clk_disable(aq->pclk);
} else {
/*
* atmel_qspi_runtime_{suspend,resume} just disable and enable
@@ -1526,9 +1506,6 @@ static void atmel_qspi_remove(struct pla
dev_warn(&pdev->dev, "Failed to resume device on remove\n");
}
- clk_unprepare(aq->qspick);
- clk_unprepare(aq->pclk);
-
pm_runtime_disable(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
pm_runtime_put_noidle(&pdev->dev);
@@ -1544,8 +1521,11 @@ static int __maybe_unused atmel_qspi_sus
if (ret < 0)
return ret;
- if (aq->caps->has_gclk)
- return atmel_qspi_sama7g5_suspend(aq);
+ if (aq->caps->has_gclk) {
+ ret = atmel_qspi_sama7g5_suspend(aq);
+ clk_disable_unprepare(aq->pclk);
+ return ret;
+ }
atmel_qspi_write(QSPI_CR_QSPIDIS, aq, QSPI_CR);