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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
166 lines
5.3 KiB
Diff
166 lines
5.3 KiB
Diff
From 4a4336e333f869544dabc729812f57f99f5f2ff8 Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Fri, 1 Nov 2024 08:09:12 +0100
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Subject: [PATCH 63/82] net: lan969x: add VCAP configuration data
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add configuration data (for consumption by the VCAP API) for the four
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VCAP's that we are going to support. The following VCAP's will be
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supported:
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- VCAP CLM: (also known as IS0) is part of the analyzer and enables
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frame classification using VCAP functionality.
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- VCAP IS2: is part of ANA_ACL and enables access control lists, using
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VCAP functionality.
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- VCAP ES0: is part of the rewriter and enables rewriting of frames
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using VCAP functionality.
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- VCAP ES2: is part of EACL and enables egress access control lists
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using VCAP functionality
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The two VCAP's: CLM and IS2 use shared resources from the SUPER VCAP.
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The SUPER VCAP is a shared pool of 6 blocks that can be distributed
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freely among CLM and IS2. Each block in the pool has 3,072 addresses
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with entries, actions, and counters. ES0 and ES2 does not use shared
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resources.
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In the configuration data for lan969x CLM uses blocks 2-4 with a total
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of 6 lookups. IS2 uses blocks 0-1 with a total of 4 lookups.
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Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com>
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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.../net/ethernet/microchip/lan969x/Makefile | 2 +-
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.../net/ethernet/microchip/lan969x/lan969x.c | 1 +
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.../net/ethernet/microchip/lan969x/lan969x.h | 3 +
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.../microchip/lan969x/lan969x_vcap_impl.c | 85 +++++++++++++++++++
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4 files changed, 90 insertions(+), 1 deletion(-)
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create mode 100644 drivers/net/ethernet/microchip/lan969x/lan969x_vcap_impl.c
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--- a/drivers/net/ethernet/microchip/lan969x/Makefile
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+++ b/drivers/net/ethernet/microchip/lan969x/Makefile
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@@ -6,7 +6,7 @@
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obj-$(CONFIG_LAN969X_SWITCH) += lan969x-switch.o
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lan969x-switch-y := lan969x_regs.o lan969x.o lan969x_calendar.o \
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- lan969x_vcap_ag_api.o
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+ lan969x_vcap_ag_api.o lan969x_vcap_impl.o
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# Provide include files
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ccflags-y += -I$(srctree)/drivers/net/ethernet/microchip/fdma
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--- a/drivers/net/ethernet/microchip/lan969x/lan969x.c
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+++ b/drivers/net/ethernet/microchip/lan969x/lan969x.c
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@@ -321,6 +321,7 @@ static const struct sparx5_consts lan969
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.tod_pin = 4,
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.vcaps = lan969x_vcaps,
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.vcap_stats = &lan969x_vcap_stats,
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+ .vcaps_cfg = lan969x_vcap_inst_cfg,
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};
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static const struct sparx5_ops lan969x_ops = {
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--- a/drivers/net/ethernet/microchip/lan969x/lan969x.h
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+++ b/drivers/net/ethernet/microchip/lan969x/lan969x.h
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@@ -18,6 +18,9 @@ extern const struct sparx5_match_data la
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extern const struct vcap_statistics lan969x_vcap_stats;
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extern const struct vcap_info lan969x_vcaps[];
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+/* lan969x_vcap_impl.c */
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+extern const struct sparx5_vcap_inst lan969x_vcap_inst_cfg[];
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+
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/* lan969x_regs.c */
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extern const unsigned int lan969x_tsize[TSIZE_LAST];
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extern const unsigned int lan969x_raddr[RADDR_LAST];
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--- /dev/null
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+++ b/drivers/net/ethernet/microchip/lan969x/lan969x_vcap_impl.c
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@@ -0,0 +1,85 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+
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+#include "vcap_api.h"
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+#include "lan969x.h"
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+
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+const struct sparx5_vcap_inst lan969x_vcap_inst_cfg[] = {
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+ {
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+ .vtype = VCAP_TYPE_IS0, /* CLM-0 */
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+ .vinst = 0,
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+ .map_id = 1,
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+ .lookups = SPARX5_IS0_LOOKUPS,
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+ .lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,
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+ .first_cid = SPARX5_VCAP_CID_IS0_L0,
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+ .last_cid = SPARX5_VCAP_CID_IS0_L2 - 1,
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+ .blockno = 2,
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+ .blocks = 1,
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+ .ingress = true,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_IS0, /* CLM-1 */
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+ .vinst = 1,
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+ .map_id = 2,
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+ .lookups = SPARX5_IS0_LOOKUPS,
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+ .lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,
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+ .first_cid = SPARX5_VCAP_CID_IS0_L2,
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+ .last_cid = SPARX5_VCAP_CID_IS0_L4 - 1,
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+ .blockno = 3,
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+ .blocks = 1,
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+ .ingress = true,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_IS0, /* CLM-2 */
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+ .vinst = 2,
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+ .map_id = 3,
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+ .lookups = SPARX5_IS0_LOOKUPS,
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+ .lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,
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+ .first_cid = SPARX5_VCAP_CID_IS0_L4,
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+ .last_cid = SPARX5_VCAP_CID_IS0_MAX,
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+ .blockno = 4,
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+ .blocks = 1,
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+ .ingress = true,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_IS2, /* IS2-0 */
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+ .vinst = 0,
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+ .map_id = 4,
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+ .lookups = SPARX5_IS2_LOOKUPS,
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+ .lookups_per_instance = SPARX5_IS2_LOOKUPS / 2,
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+ .first_cid = SPARX5_VCAP_CID_IS2_L0,
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+ .last_cid = SPARX5_VCAP_CID_IS2_L2 - 1,
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+ .blockno = 0,
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+ .blocks = 1,
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+ .ingress = true,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_IS2, /* IS2-1 */
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+ .vinst = 1,
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+ .map_id = 5,
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+ .lookups = SPARX5_IS2_LOOKUPS,
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+ .lookups_per_instance = SPARX5_IS2_LOOKUPS / 2,
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+ .first_cid = SPARX5_VCAP_CID_IS2_L2,
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+ .last_cid = SPARX5_VCAP_CID_IS2_MAX,
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+ .blockno = 1,
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+ .blocks = 1,
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+ .ingress = true,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_ES0,
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+ .lookups = SPARX5_ES0_LOOKUPS,
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+ .lookups_per_instance = SPARX5_ES0_LOOKUPS,
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+ .first_cid = SPARX5_VCAP_CID_ES0_L0,
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+ .last_cid = SPARX5_VCAP_CID_ES0_MAX,
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+ .count = 1536,
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+ .ingress = false,
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+ },
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+ {
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+ .vtype = VCAP_TYPE_ES2,
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+ .lookups = SPARX5_ES2_LOOKUPS,
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+ .lookups_per_instance = SPARX5_ES2_LOOKUPS,
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+ .first_cid = SPARX5_VCAP_CID_ES2_L0,
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+ .last_cid = SPARX5_VCAP_CID_ES2_MAX,
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+ .count = 1024,
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+ .ingress = false,
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+ },
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+};
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