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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
137 lines
5.1 KiB
Diff
137 lines
5.1 KiB
Diff
From e8df6924d6e793aca572b8fa766779354d20adae Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Fri, 4 Oct 2024 15:19:39 +0200
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Subject: [PATCH 41/82] net: sparx5: ops out function for DSM calendar
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calculation
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The DSM (Disassembler) calendar grants each port access to internal
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busses. The configuration of the calendar is done differently on Sparx5
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and lan969x. Therefore ops out the function that calculates the
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calendar.
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Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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.../microchip/sparx5/sparx5_calendar.c | 22 ++++---------------
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.../ethernet/microchip/sparx5/sparx5_main.c | 1 +
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.../ethernet/microchip/sparx5/sparx5_main.h | 21 ++++++++++++++++++
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3 files changed, 26 insertions(+), 18 deletions(-)
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
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@@ -15,9 +15,7 @@
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#define SPX5_CALBITS_PER_PORT 3 /* Bit per port in calendar register */
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/* DSM calendar information */
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-#define SPX5_DSM_CAL_LEN 64
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#define SPX5_DSM_CAL_EMPTY 0xFFFF
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-#define SPX5_DSM_CAL_MAX_DEVS_PER_TAXI 13
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#define SPX5_DSM_CAL_TAXIS 8
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#define SPX5_DSM_CAL_BW_LOSS 553
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@@ -37,19 +35,6 @@ static u32 sparx5_taxi_ports[SPX5_DSM_CA
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{64, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99},
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};
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-struct sparx5_calendar_data {
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- u32 schedule[SPX5_DSM_CAL_LEN];
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- u32 avg_dist[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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- u32 taxi_ports[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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- u32 taxi_speeds[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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- u32 dev_slots[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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- u32 new_slots[SPX5_DSM_CAL_LEN];
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- u32 temp_sched[SPX5_DSM_CAL_LEN];
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- u32 indices[SPX5_DSM_CAL_LEN];
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- u32 short_list[SPX5_DSM_CAL_LEN];
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- u32 long_list[SPX5_DSM_CAL_LEN];
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-};
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-
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static u32 sparx5_target_bandwidth(struct sparx5 *sparx5)
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{
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switch (sparx5->target_ct) {
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@@ -279,8 +264,8 @@ static u32 sparx5_dsm_cp_cal(u32 *sched)
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return SPX5_DSM_CAL_EMPTY;
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}
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-static int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi,
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- struct sparx5_calendar_data *data)
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+int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi,
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+ struct sparx5_calendar_data *data)
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{
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bool slow_mode;
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u32 gcd, idx, sum, min, factor;
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@@ -566,6 +551,7 @@ update_err:
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/* Configure the DSM calendar based on port configuration */
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int sparx5_config_dsm_calendar(struct sparx5 *sparx5)
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{
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+ const struct sparx5_ops *ops = sparx5->data->ops;
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int taxi;
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struct sparx5_calendar_data *data;
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int err = 0;
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@@ -575,7 +561,7 @@ int sparx5_config_dsm_calendar(struct sp
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return -ENOMEM;
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for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) {
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- err = sparx5_dsm_calendar_calc(sparx5, taxi, data);
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+ err = ops->dsm_calendar_calc(sparx5, taxi, data);
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if (err) {
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dev_err(sparx5->dev, "DSM calendar calculation failed\n");
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goto cal_out;
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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@@ -994,6 +994,7 @@ static const struct sparx5_ops sparx5_op
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.get_sdlb_group = &sparx5_get_sdlb_group,
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.set_port_mux = &sparx5_port_mux_set,
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.ptp_irq_handler = &sparx5_ptp_irq_handler,
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+ .dsm_calendar_calc = &sparx5_dsm_calendar_calc,
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};
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static const struct sparx5_match_data sparx5_desc = {
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h
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@@ -101,8 +101,24 @@ enum sparx5_vlan_port_type {
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#define IFH_PDU_TYPE_IPV4_UDP_PTP 0x6
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#define IFH_PDU_TYPE_IPV6_UDP_PTP 0x7
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+#define SPX5_DSM_CAL_LEN 64
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+#define SPX5_DSM_CAL_MAX_DEVS_PER_TAXI 13
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+
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struct sparx5;
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+struct sparx5_calendar_data {
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+ u32 schedule[SPX5_DSM_CAL_LEN];
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+ u32 avg_dist[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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+ u32 taxi_ports[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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+ u32 taxi_speeds[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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+ u32 dev_slots[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI];
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+ u32 new_slots[SPX5_DSM_CAL_LEN];
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+ u32 temp_sched[SPX5_DSM_CAL_LEN];
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+ u32 indices[SPX5_DSM_CAL_LEN];
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+ u32 short_list[SPX5_DSM_CAL_LEN];
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+ u32 long_list[SPX5_DSM_CAL_LEN];
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+};
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+
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/* Frame DMA receive state:
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* For each DB, there is a SKB, and the skb data pointer is mapped in
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* the DB. Once a frame is received the skb is given to the upper layers
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@@ -271,6 +287,8 @@ struct sparx5_ops {
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struct sparx5_port_config *conf);
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irqreturn_t (*ptp_irq_handler)(int irq, void *args);
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+ int (*dsm_calendar_calc)(struct sparx5 *sparx5, u32 taxi,
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+ struct sparx5_calendar_data *data);
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};
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struct sparx5_main_io_resource {
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@@ -418,6 +436,9 @@ void sparx5_vlan_port_apply(struct sparx
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/* sparx5_calendar.c */
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int sparx5_config_auto_calendar(struct sparx5 *sparx5);
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int sparx5_config_dsm_calendar(struct sparx5 *sparx5);
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+int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi,
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+ struct sparx5_calendar_data *data);
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+
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/* sparx5_ethtool.c */
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void sparx5_get_stats64(struct net_device *ndev, struct rtnl_link_stats64 *stats);
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