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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
74 lines
2.9 KiB
Diff
74 lines
2.9 KiB
Diff
From def4582837fa546a00860649a253c47107123060 Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Fri, 4 Oct 2024 15:19:37 +0200
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Subject: [PATCH 39/82] net: sparx5: ops out function for setting the port mux
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Port muxing is configured based on the supported port modes. As these
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modes can differ on Sparx5 and lan969x we ops out the port muxing
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function.
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Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 1 +
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drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 6 ++++++
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drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 7 +++----
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3 files changed, 10 insertions(+), 4 deletions(-)
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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@@ -991,6 +991,7 @@ static const struct sparx5_ops sparx5_op
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.get_port_dev_bit = &sparx5_port_dev_mapping,
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.get_hsch_max_group_rate = &sparx5_get_hsch_max_group_rate,
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.get_sdlb_group = &sparx5_get_sdlb_group,
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+ .set_port_mux = &sparx5_port_mux_set,
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};
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static const struct sparx5_match_data sparx5_desc = {
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h
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@@ -267,6 +267,8 @@ struct sparx5_ops {
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u32 (*get_port_dev_bit)(struct sparx5 *sparx5, int port);
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u32 (*get_hsch_max_group_rate)(int grp);
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struct sparx5_sdlb_group *(*get_sdlb_group)(int idx);
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+ int (*set_port_mux)(struct sparx5 *sparx5, struct sparx5_port *port,
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+ struct sparx5_port_config *conf);
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};
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struct sparx5_main_io_resource {
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@@ -485,6 +487,10 @@ int sparx5_pool_get(struct sparx5_pool_e
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int sparx5_pool_get_with_idx(struct sparx5_pool_entry *pool, int size, u32 idx,
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u32 *id);
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+/* sparx5_port.c */
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+int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port,
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+ struct sparx5_port_config *conf);
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+
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/* sparx5_sdlb.c */
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#define SPX5_SDLB_PUP_TOKEN_DISABLE 0x1FFF
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#define SPX5_SDLB_PUP_TOKEN_MAX (SPX5_SDLB_PUP_TOKEN_DISABLE - 1)
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
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@@ -516,9 +516,8 @@ static int sparx5_port_fifo_sz(struct sp
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/* Configure port muxing:
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* QSGMII: 4x2G5 devices
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*/
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-static int sparx5_port_mux_set(struct sparx5 *sparx5,
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- struct sparx5_port *port,
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- struct sparx5_port_config *conf)
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+int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port,
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+ struct sparx5_port_config *conf)
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{
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u32 portno = port->portno;
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u32 inst;
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@@ -1039,7 +1038,7 @@ int sparx5_port_init(struct sparx5 *spar
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pcsinst = spx5_inst_get(sparx5, pcs, pix);
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/* Set the mux port mode */
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- err = sparx5_port_mux_set(sparx5, port, conf);
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+ err = ops->set_port_mux(sparx5, port, conf);
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if (err)
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return err;
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