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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
77 lines
2.4 KiB
Diff
77 lines
2.4 KiB
Diff
From e072ab8d032cd89a6c5333652c2ea909a8942b8a Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Mon, 9 Sep 2024 17:14:45 +0200
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Subject: [PATCH 12/25] phy: sparx5-serdes: add function for getting the CMU
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index
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The SERDES to CMU mapping is different on Sparx5 and lan969x. Therefore
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create a function for getting the CMU index on Sparx5.
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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Link: https://lore.kernel.org/r/20240909-sparx5-lan969x-serdes-driver-v2-5-d695bcb57b84@microchip.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/microchip/sparx5_serdes.c | 11 ++---------
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drivers/phy/microchip/sparx5_serdes.h | 9 +++++++++
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2 files changed, 11 insertions(+), 9 deletions(-)
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--- a/drivers/phy/microchip/sparx5_serdes.c
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+++ b/drivers/phy/microchip/sparx5_serdes.c
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@@ -28,14 +28,6 @@
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/* Optimal power settings from GUC */
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#define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c
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-enum sparx5_10g28cmu_mode {
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- SPX5_SD10G28_CMU_MAIN = 0,
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- SPX5_SD10G28_CMU_AUX1 = 1,
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- SPX5_SD10G28_CMU_AUX2 = 3,
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- SPX5_SD10G28_CMU_NONE = 4,
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- SPX5_SD10G28_CMU_MAX,
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-};
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-
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enum sparx5_sd25g28_mode_preset_type {
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SPX5_SD25G28_MODE_PRESET_25000,
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SPX5_SD25G28_MODE_PRESET_10000,
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@@ -1648,7 +1640,7 @@ static int sparx5_sd10g28_apply_params(s
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if (params->skip_cmu_cfg)
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return 0;
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- cmu_idx = sparx5_serdes_cmu_get(params->cmu_sel, lane_index);
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+ cmu_idx = priv->data->ops.serdes_cmu_get(params->cmu_sel, macro->sidx);
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err = sparx5_cmu_cfg(priv, cmu_idx);
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if (err)
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return err;
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@@ -2520,6 +2512,7 @@ static const struct sparx5_serdes_match_
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},
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.ops = {
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.serdes_type_set = &sparx5_serdes_type_set,
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+ .serdes_cmu_get = &sparx5_serdes_cmu_get,
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},
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};
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--- a/drivers/phy/microchip/sparx5_serdes.h
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+++ b/drivers/phy/microchip/sparx5_serdes.h
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@@ -26,6 +26,14 @@ enum sparx5_serdes_mode {
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SPX5_SD_MODE_SFI,
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};
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+enum sparx5_10g28cmu_mode {
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+ SPX5_SD10G28_CMU_MAIN = 0,
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+ SPX5_SD10G28_CMU_AUX1 = 1,
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+ SPX5_SD10G28_CMU_AUX2 = 3,
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+ SPX5_SD10G28_CMU_NONE = 4,
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+ SPX5_SD10G28_CMU_MAX,
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+};
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+
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struct sparx5_serdes_macro {
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struct sparx5_serdes_private *priv;
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u32 sidx;
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@@ -44,6 +52,7 @@ struct sparx5_serdes_consts {
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struct sparx5_serdes_ops {
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void (*serdes_type_set)(struct sparx5_serdes_macro *macro, int sidx);
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+ int (*serdes_cmu_get)(enum sparx5_10g28cmu_mode mode, int sd_index);
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};
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struct sparx5_serdes_match_data {
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