Thibaut VARÈNE 7aa929881e mediatek/filogic: fix Cudy WR3000H ethernet port order ... The ports are physically labelled in reverse order on the device. This patch aligns logical names with physical ones. LED order on front of device is correct after this patch. Fixes: 9d66b8b312 Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> Link: https://github.com/openwrt/openwrt/pull/20528 (cherry picked from commit 887cab883b) Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> Link: https://github.com/openwrt/openwrt/pull/21173 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>		2025-12-16 00:11:44 +01:00
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base-files	mediatek: add support for Cudy TR3000 256MB v1 flash version	2025-07-10 20:45:19 +02:00
dts	mediatek/filogic: fix Cudy WR3000H ethernet port order	2025-12-16 00:11:44 +01:00
files/drivers	mediatek: Remove modules.builtin file	2025-08-24 15:30:57 +02:00
files-6.6	mediatek: add Airoha AN8855 gigabit switch driver	2025-01-23 15:28:08 +01:00
filogic	mediatek/filogic: fix Totolink X6000R sysupgrade failed	2025-12-14 22:51:17 +01:00
image	mediatek: filogic: add support for Totolink X6000R	2025-12-14 22:51:01 +01:00
mt7622	mediatek: Refresh kernel configuration	2025-03-08 17:04:20 +01:00
mt7623	mediatek: Refresh kernel configuration	2025-03-08 17:04:20 +01:00
mt7629	mediatek: Refresh kernel configuration	2025-03-08 17:04:20 +01:00
patches-6.6	kernel: bump 6.6 to 6.6.119	2025-12-11 22:11:28 +01:00
Makefile	mediatek: change the the default SUBTARGET to filogic	2024-10-02 15:12:18 +02:00
modules.mk	mediatek: mt7623: build mt6577_auxadc driver into kernel	2022-12-05 23:14:36 +00:00