Tomasz Maciej Nowak 67ed408af2 mvebu: cortexa9: correct cpu subtype ... Armada 370 processors have only 16 double-precision registers. The change introduced by 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for mvebu cortexa9 subtarget to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> (cherry picked from commit 2d61f8821c)		2020-04-18 00:18:13 +02:00
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base-files	treewide: use new procd sysupgrade $UPGRADE_BACKUP variable	2019-09-12 13:27:29 +02:00
cortexa9	mvebu: cortexa9: correct cpu subtype	2020-04-18 00:18:13 +02:00
cortexa53	kernel: Remove CONFIG_COMPAT	2019-05-11 17:15:41 +02:00
cortexa72	kernel: Remove CONFIG_COMPAT	2019-05-11 17:15:41 +02:00
files-4.14/arch	mvebu: add images for additional ESPRESSObin boards	2019-05-11 23:11:04 +02:00
image	mvebu: image: fix generic-arm64.bootscript mmc selection	2019-06-28 21:52:21 +02:00
patches-4.14	mvebu: backport ClearFog SPI enablement	2020-04-18 00:18:13 +02:00
config-4.14	mvebu: enable xHCI USB controller connected to PCIe	2019-08-17 00:17:46 +02:00
Makefile	mvebu: make bootfs size for sdcard image configurable	2019-04-06 16:31:10 +02:00