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openwrt/target/linux/realtek/files-6.12
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Sven Eckelmann 84b7057fe3
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realtek: dsa: rtl931x: Fix port L2 table flushing 
The DSA driver must flush the HW FDB when a port changes from
learning/forwarding to disabled/blocking/listening.

But the implementation for RTL931x was writing the port information
starting at bit 11 (bit 11 of the second 32-bit L2_TBL_FLUSH_CTRL
register). But this offset is the AGG_VID and not the port. The actual
position is 43 (bit 11 of the first register).

As result, the FDB was always only flushed for the port 0 and not for the
selected port.

Fixes: 9ed6097054 ("realtek: Add HW support for RTL931X for PIE, L2 and STP aging")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20422
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-10-16 16:35:20 +02:00
..
arch/mips realtek: rtl931x: Add SPI_CTRL0 as pinmux 2025-10-02 10:30:16 +02:00
Documentation/devicetree/bindings/i2c realtek: cleanup documentation 2025-08-14 10:35:39 +02:00
drivers realtek: dsa: rtl931x: Fix port L2 table flushing 2025-10-16 16:35:20 +02:00
include/dt-bindings/clock