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The DSA driver must flush the HW FDB when a port changes from
learning/forwarding to disabled/blocking/listening.
But the implementation for RTL931x was writing the port information
starting at bit 11 (bit 11 of the second 32-bit L2_TBL_FLUSH_CTRL
register). But this offset is the AGG_VID and not the port. The actual
position is 43 (bit 11 of the first register).
As result, the FDB was always only flushed for the port 0 and not for the
selected port.
Fixes:
|
||
|---|---|---|
| .. | ||
| base-files | ||
| dts | ||
| files/firmware/rtl838x_phy | ||
| files-6.12 | ||
| image | ||
| patches-6.12 | ||
| profiles | ||
| rtl838x | ||
| rtl839x | ||
| rtl930x | ||
| rtl930x_nand | ||
| rtl931x | ||
| rtl931x_nand | ||
| Makefile | ||