openwrt/target/linux/qualcommax/dts/ipq8070-rm2-6.dts
Christian Marangi a66e30631c
qualcommax: move Device DTS to dedicated DTS directory
Align the qualcommax target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.

This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)

Link: https://github.com/openwrt/openwrt/pull/22037
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-02-16 13:14:13 +01:00

310 lines
4.9 KiB
Text

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ipq8074-512m.dtsi"
#include "ipq8074-ac-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "CMCC RM2-6";
compatible = "cmcc,rm2-6", "qcom,ipq8074";
aliases {
serial0 = &blsp1_uart5;
serial1 = &blsp1_uart3;
led-boot = &led_status_red;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_amber;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = &dp4;
ethernet1 = &dp2;
ethernet2 = &dp5;
label-mac-device = &dp4;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status_amber: status-amber {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
};
led_status_blue: status-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
};
led_status_red: status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
};
};
fan: gpio-fan {
#cooling-cells = <2>;
compatible = "gpio-fan";
gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0>, <1 1>;
};
};
&tlmm {
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&blsp1_uart3 {
status = "okay";
};
&blsp1_uart5 {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&prng {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
};
};
};
&cpu0_thermal {
trips {
cpu0_trip_active: cpu-active {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&cpu0_trip_active>;
};
};
};
&cpu1_thermal {
trips {
cpu1_trip_active: cpu-active {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&cpu1_trip_active>;
};
};
};
&cpu2_thermal {
trips {
cpu2_trip_active: cpu-active {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&cpu2_trip_active>;
};
};
};
&cpu3_thermal {
trips {
cpu3_trip_active: cpu-active {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&cpu3_trip_active>;
};
};
};
&cluster_thermal {
trips {
cluster_active: cluster-active {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cluster-active {
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
trip = <&cluster_active>;
};
};
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
ethernet-phy-package@0 {
compatible = "qcom,qca8075-package";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
qca8075_1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
qca8075_3: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <3>;
};
qca8075_4: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <4>;
};
};
};
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT2 | ESS_PORT4)>;
switch_wan_bmp = <ESS_PORT5>;
switch_mac_mode = <MAC_MODE_PSGMII>;
qcom,port_phyinfo {
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port_id = <5>;
phy_address = <4>;
};
};
};
&edma {
status = "okay";
};
/*
* Directly connect to the Hi5630
* PLC (Power Line Communication)
*/
&dp2 {
status = "okay";
phy-handle = <&qca8075_1>;
label = "plc";
};
&dp4 {
status = "okay";
phy-handle = <&qca8075_3>;
label = "lan";
};
&dp5 {
status = "okay";
phy-handle = <&qca8075_4>;
label = "wan";
};
&wifi {
status = "okay";
qcom,ath11k-calibration-variant = "CMCC-RM2-6";
qcom,ath11k-fw-memory-mode = <1>;
};