mediatek: filogic: add support for Kebidumei AX3000-U22

Kebidumei AX3000-U22 is one of many clones of the same range extender
that can be found on Aliexpress or other Chinese portals.

The easiest way to identify this model is by searching for "AX3000
Repeater" and picking the device that looks like mine [0].

Specification:
- SoC:     MediaTek MT7981B (1.3 GHz)
- RAM:     256 MB
- Flash:   16 MB SPI NOR
- Ports:   1 x 1 GbE
- Antenna: 6 (2 fake)
- WiFi:    MediaTek dual-band WiFi 6
  - 2.4 GHz: b/g/n/ax, MIMO 2x2
  - 5 GHz:   a/n/ac/ax, MIMO 2x2
- Buttons: Reset & WPS
- LEDs:    Ethernet (green), Status (red, green, blue)
- Power:   110–240 V AC (internal PSU, board uses 12 V DC)
- Serial:  unmarked connector on PCB
           [1: Vcc, 2: RX, 3: TX, 4: GND]

Install via OEM web UI:
1. Use reset button to perform factory reset.
2. Connect PC to LAN port and obtain DHCP address.
3. Upload the sysupgrade image via OEM firmware upgrade page,
   e.g. http://192.168.18.1/upgrade.html
4. After reboot, hold reset button to clear leftover vendor config.

Install via serial:
1. Connect serial console (115200 8N1).
2. Enter the console.
3. Backup mtd4 partition if you want to restore OEM FW later.
4. Download image.
5. Run 'sysupgrade -n'.

Revert to stock:
1. Run sysupgrade without keeping config using mtd4 backup.

[0] https://openwrt.org/_media/media/kebidumei_ax3000-u22.png

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20287
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

package/boot/uboot-tools/uboot-envtools/files/ipq40xx

@@ -11,25 +11,6 @@ touch /etc/config/ubootenv
 
 board=$(board_name)
 
-ubootenv_mtdinfo () {
-	UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV)
-	mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//')
-	mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}')
-	mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}')
-	nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev})
-
-	if [ -n "$nor_flash" ]; then
-		ubootenv_size=$mtd_size
-	else
-		# size is fixed to 0x40000 in u-boot
-		ubootenv_size=0x40000
-	fi
-
-	sectors=$(( $ubootenv_size / $mtd_erase ))
-	sectors=$(printf "0x%x" $sectors )
-	echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors
-}
-
 case "$board" in
 alfa-network,ap120c-ac|\
 devolo,magic-2-wifi-next|\

package/boot/uboot-tools/uboot-envtools/files/lantiq

@@ -12,15 +12,13 @@ touch /etc/config/ubootenv
 board=$(board_name)
 
 case "$board" in
-bt,homehub-v2b)
+bt,homehub-v2b|\
+siemens,gigaset-sx76x)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000" "1"
 	;;
 bt,homehub-v3a)
 	ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x4000" "0x4000" "1"
 	;;
-siemens,gigaset-sx76x)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000" "1"
-	;;
 zyxel,p-2812hnu-f1)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x2000" "0x20000" "1"
 	;;

package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic

@@ -37,6 +37,7 @@ netcore,n60|\
 netcore,n60-pro|\
 netis,nx31|\
 nokia,ea0326gmp|\
+openwrt,one|\
 qihoo,360t7|\
 routerich,ax3000-ubootmod|\
 snr,snr-cpe-ax2|\
@@ -61,6 +62,15 @@ huasifei,wh3000|\
 nradio,c8-668gl)
 	ubootenv_add_mmc "u-boot-env" "" "0x0" "0x80000"
 	;;
+asiarf,ap7986-003|\
+cetron,ct3003|\
+comfast,cf-wr632ax|\
+edgecore,eap111|\
+netgear,wax220|\
+zbtlink,zbt-z8102ax|\
+zbtlink,zbt-z8103ax)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
+	;;
 asus,rt-ax59u)
 	ubootenv_add_uci_config "/dev/mtd0" "0x100000" "0x20000" "0x20000"
 	;;
@@ -100,15 +110,6 @@ comfast,cf-e393ax|\
 iptime,ax3000m)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x80000"
 	;;
-asiarf,ap7986-003|\
-cetron,ct3003|\
-comfast,cf-wr632ax|\
-edgecore,eap111|\
-netgear,wax220|\
-zbtlink,zbt-z8102ax|\
-zbtlink,zbt-z8103ax)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
-	;;
 dlink,aquila-pro-ai-m30-a1|\
 dlink,aquila-pro-ai-m60-a1)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x40000"
@@ -123,14 +124,14 @@ openembed,som7981)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x80000"
 	ubootenv_add_uci_sys_config "/dev/mtd3" "0x0" "0x100000" "0x100000"
 	;;
-openwrt,one)
-	ubootenv_add_ubi_default
-	;;
 smartrg,sdg-8733|\
 smartrg,sdg-8733a|\
 smartrg,sdg-8734)
 	ubootenv_add_mmc "u-boot-env" "mmcblk0" "0x0" "0x8000" "0x8000"
 	;;
+teltonika,rutc50)
+	ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
+	;;
 tplink,archer-ax80-v1|\
 tplink,be450)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" "8"
@@ -138,9 +139,6 @@ tplink,be450)
 ubnt,unifi-6-plus)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x10000"
 	;;
-teltonika,rutc50)
-	ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
-	;;
 xiaomi,mi-router-ax3000t|\
 xiaomi,mi-router-wr30u-stock|\
 xiaomi,redmi-router-ax6000-stock)

package/boot/uboot-tools/uboot-envtools/files/mediatek_mt7622

@@ -20,10 +20,6 @@ case "$board" in
 asiarf,ap7622-wh1)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x1000" "0x10000"
 	;;
-dlink,eagle-pro-ai-m32-a1|\
-dlink,eagle-pro-ai-r32-a1)
-	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x2000" "0x2000"
-	;;
 bananapi,bpi-r64|\
 linksys,e8450-ubi)
 	. /lib/upgrade/fit.sh
@@ -41,6 +37,10 @@ linksys,e8450-ubi)
 buffalo,wsr-2533dhp2)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x1000" "0x20000"
 	;;
+dlink,eagle-pro-ai-m32-a1|\
+dlink,eagle-pro-ai-r32-a1)
+	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x2000" "0x2000"
+	;;
 ruijie,rg-ew3200gx-pro)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x20000" "0x20000"
 	;;

package/boot/uboot-tools/uboot-envtools/files/qualcommax_ipq807x

@@ -15,6 +15,10 @@ zyxel,nbg7815|\
 zyxel,nwa210ax)
 	ubootenv_add_mtd "0:appsblenv" "0x0" "0x10000" "0x10000"
 	;;
+asus,rt-ax89x|\
+qnap,301w)
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x20000" "0x20000"
+	;;
 dynalink,dl-wrx36|\
 netgear,rax120v2|\
 netgear,sxr80|\
@@ -42,19 +46,15 @@ linksys,mx8500)
 linksys,mx4300)
 	ubootenv_add_mtd "u_env" "0x0" "0x40000" "0x40000"
 	;;
+prpl,haze)
+	ubootenv_add_mmc "0:APPSBLENV" "" "0x0" "0x40000" "0x400" "0x100"
+	;;
 redmi,ax6|\
 xiaomi,ax3600|\
 xiaomi,ax9000)
 	ubootenv_add_mtd "0:appsblenv" "0x0" "0x10000" "0x20000"
 	ubootenv_add_sys_mtd "bdata" "0x0" "0x10000" "0x20000"
 	;;
-prpl,haze)
-	ubootenv_add_mmc "0:APPSBLENV" "" "0x0" "0x40000" "0x400" "0x100"
-	;;
-asus,rt-ax89x|\
-qnap,301w)
-	ubootenv_add_mtd "0:appsblenv" "0x0" "0x20000" "0x20000"
-	;;
 spectrum,sax1v1k)
 	ubootenv_add_mmc "0:APPSBLENV" "" "0x0" "0x40000" "0x40000" "1"
 	;;

package/boot/uboot-tools/uboot-envtools/files/ramips

@@ -36,39 +36,13 @@ plasmacloud,pax1800-lite|\
 yuncore,ax820)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
 	;;
-arcadyan,we420223-99|\
-dlink,dir-806a-b1)
-	ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x1000" "0x1000"
-	;;
 ampedwireless,ally-00x19k|\
 ampedwireless,ally-r1900k)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000" "4"
 	;;
-beeline,smartbox-giga|\
-beeline,smartbox-turbo|\
-beeline,smartbox-turbo-plus|\
-etisalat,s3|\
-rostelecom,rt-fe-1a|\
-rostelecom,rt-sf-1)
-	ubootenv_add_uci_config "/dev/mtd0" "0x80000" "0x1000" "0x20000"
-	;;
-beeline,smartbox-pro|\
-tplink,ec330-g5u-v1|\
-wifire,s1500-nbn)
-	ubootenv_add_mtd "u-boot-env" "0x0" "0x1000" "0x20000"
-	;;
-buffalo,wsr-1166dhp|\
-buffalo,wsr-600dhp|\
-kroks,kndrt31r16|\
-kroks,kndrt31r19|\
-mediatek,linkit-smart-7688|\
-samknows,whitebox-v8|\
-xiaomi,mi-router-4c|\
-xiaomi,miwifi-3a|\
-xiaomi,miwifi-nano|\
-zbtlink,zbt-wg2626|\
-zte,mf283plus)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
+arcadyan,we420223-99|\
+dlink,dir-806a-b1)
+	ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x1000" "0x1000"
 	;;
 asus,rt-ax53u|\
 asus,rt-ax54|\
@@ -88,16 +62,6 @@ netis,n6|\
 zyxel,wsm20)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
 	;;
-haier,har-20s2u1|\
-sim,simax1800t|\
-sim,simax1800u)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
-	ubootenv_add_uci_sys_config "/dev/mtd1" "0x40000" "0x40000" "0x20000"
-	;;
-hootoo,ht-tm05|\
-ravpower,rp-wd03)
-	ubootenv_add_mtd "u-boot-env" "0x4000" "0x1000" "0x1000"
-	;;
 beeline,smartbox-flash|\
 iptime,t5004|\
 linksys,ea6350-v4|\
@@ -111,14 +75,69 @@ ubnt,edgerouter-x|\
 ubnt,edgerouter-x-sfp)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
 	;;
+beeline,smartbox-giga|\
+beeline,smartbox-turbo|\
+beeline,smartbox-turbo-plus|\
+etisalat,s3|\
+rostelecom,rt-fe-1a|\
+rostelecom,rt-sf-1)
+	ubootenv_add_uci_config "/dev/mtd0" "0x80000" "0x1000" "0x20000"
+	;;
+beeline,smartbox-pro|\
+tplink,ec330-g5u-v1|\
+wifire,s1500-nbn)
+	ubootenv_add_mtd "u-boot-env" "0x0" "0x1000" "0x20000"
+	;;
+bolt,arion|\
+xiaomi,mi-router-cr6606|\
+xiaomi,mi-router-cr6608|\
+xiaomi,mi-router-cr6609)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000"
+	;;
+buffalo,wsr-1166dhp|\
+buffalo,wsr-600dhp|\
+kroks,kndrt31r16|\
+kroks,kndrt31r19|\
+mediatek,linkit-smart-7688|\
+samknows,whitebox-v8|\
+xiaomi,mi-router-4c|\
+xiaomi,miwifi-3a|\
+xiaomi,miwifi-nano|\
+zbtlink,zbt-wg2626|\
+zte,mf283plus)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
+	;;
+dna,valokuitu-plus-ex400|\
+genexis,pulse-ex400)
+	ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
+	ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"
+	;;
+haier,har-20s2u1|\
+sim,simax1800t|\
+sim,simax1800u)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
+	ubootenv_add_uci_sys_config "/dev/mtd1" "0x40000" "0x40000" "0x20000"
+	;;
+hootoo,ht-tm05|\
+ravpower,rp-wd03)
+	ubootenv_add_mtd "u-boot-env" "0x4000" "0x1000" "0x1000"
+	;;
+netgear,wax214v2)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
+	ubootenv_add_uci_sys_config "/dev/mtd1" "0x20000" "0x8000" "0x20000"
+	;;
 snr,snr-cpe-me1|\
 snr,snr-cpe-me2-sfp|\
 snr,cpe-w4n-mt)
 	ubootenv_add_mtd "uboot-env" "0x0" "0x1000" "0x1000"
 	;;
-xiaomi,miwifi-mini)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
-	ubootenv_add_uci_sys_config "/dev/mtd9" "0x0" "0x4000" "0x10000"
+xiaomi,mi-router-3-pro|\
+xiaomi,mi-router-3g|\
+xiaomi,mi-router-4|\
+xiaomi,mi-router-ac2100|\
+xiaomi,redmi-router-ac2100)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
+	ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x4000" "0x20000"
 	;;
 xiaomi,mi-router-3g-v2|\
 xiaomi,mi-router-4a-gigabit|\
@@ -126,13 +145,9 @@ xiaomi,miwifi-3c)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
 	ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x4000" "0x10000"
 	;;
-xiaomi,mi-router-3g|\
-xiaomi,mi-router-3-pro|\
-xiaomi,mi-router-4|\
-xiaomi,mi-router-ac2100|\
-xiaomi,redmi-router-ac2100)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
-	ubootenv_add_uci_sys_config "/dev/mtd2" "0x0" "0x4000" "0x20000"
+xiaomi,miwifi-mini)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000"
+	ubootenv_add_uci_sys_config "/dev/mtd9" "0x0" "0x4000" "0x10000"
 	;;
 zyxel,lte3301-plus)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x80000"
@@ -142,21 +157,6 @@ zyxel,lte7490-m904|\
 zyxel,nr7101)
 	ubootenv_add_mtd "Config" "0x0" "0x1000" "0x80000"
 	;;
-bolt,arion|\
-xiaomi,mi-router-cr6606|\
-xiaomi,mi-router-cr6608|\
-xiaomi,mi-router-cr6609)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000"
-	;;
-dna,valokuitu-plus-ex400|\
-genexis,pulse-ex400)
-	ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
-	ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"
-	;;
-netgear,wax214v2)
-	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
-	ubootenv_add_uci_sys_config "/dev/mtd1" "0x20000" "0x8000" "0x20000"
-	;;
 esac
 
 config_load ubootenv

package/boot/uboot-tools/uboot-envtools/files/realtek

@@ -31,15 +31,15 @@ zyxel,gs1900-48-a1)
 	ubootenv_add_mtd "u-boot-env" "0x0" "0x400" "0x10000"
 	ubootenv_add_sys_mtd "u-boot-env2" "0x0" "0x1000" "0x10000"
 	;;
+iodata,bsh-g24mb)
+	ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
+	ubootenv_add_sys_mtd "u-boot-env2" "0x0" "0x3800" "0x10000"
+	;;
 tplink,sg2008p-v1|\
 tplink,sg2210p-v3|\
 tplink,sg2452p-v4)
 	ubootenv_add_mtd "u-boot-env" "0x0" "0x20000" "0x10000"
 	;;
-iodata,bsh-g24mb)
-	ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
-	ubootenv_add_sys_mtd "u-boot-env2" "0x0" "0x3800" "0x10000"
-	;;
 *)
 	ubootenv_add_mtd "u-boot-env" "0x0" "0x10000" "0x10000"
 	ubootenv_add_sys_mtd "u-boot-env2" "0x0" "0x1000" "0x10000"

package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c

@@ -363,38 +363,34 @@ static irqreturn_t button_handle_irq(int irq, void *_bdata)
 static struct gpio_keys_platform_data *
 gpio_keys_get_devtree_pdata(struct device *dev)
 {
-	struct device_node *node, *pp;
+	struct device_node *node = dev->of_node;
 	struct gpio_keys_platform_data *pdata;
-	struct gpio_keys_button *button;
 	int nbuttons;
 	int i = 0;
 
-	node = dev->of_node;
-	if (!node)
-		return NULL;
-
 	nbuttons = of_get_available_child_count(node);
 	if (nbuttons == 0)
 		return ERR_PTR(-EINVAL);
 
-	pdata = devm_kzalloc(dev, sizeof(*pdata) + nbuttons * (sizeof *button),
-		GFP_KERNEL);
+	pdata = devm_kzalloc(dev, sizeof(struct gpio_keys_platform_data), GFP_KERNEL);
 	if (!pdata)
 		return ERR_PTR(-ENOMEM);
 
-	pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
+	pdata->buttons = devm_kmalloc_array(dev, nbuttons, sizeof(struct gpio_keys_button), GFP_KERNEL);
+	if (!pdata->buttons)
+		return ERR_PTR(-ENOMEM);
+
 	pdata->nbuttons = nbuttons;
 
-	pdata->rep = !!of_get_property(node, "autorepeat", NULL);
+	pdata->rep = of_property_present(node, "autorepeat");
 	of_property_read_u32(node, "poll-interval", &pdata->poll_interval);
 
-	for_each_available_child_of_node(node, pp) {
-		button = (struct gpio_keys_button *)(&pdata->buttons[i++]);
+	for_each_available_child_of_node_scoped(node, pp) {
+		struct gpio_keys_button *button = (struct gpio_keys_button *)&pdata->buttons[i++];
 
 		if (of_property_read_u32(pp, "linux,code", &button->code)) {
 			dev_err(dev, "Button node '%s' without keycode\n",
 				pp->full_name);
-			of_node_put(pp);
 			return ERR_PTR(-EINVAL);
 		}
 
@@ -403,7 +399,7 @@ gpio_keys_get_devtree_pdata(struct device *dev)
 		if (of_property_read_u32(pp, "linux,input-type", &button->type))
 			button->type = EV_KEY;
 
-		button->wakeup = !!of_get_property(pp, "gpio-key,wakeup", NULL);
+		button->wakeup = of_property_present(pp, "gpio-key,wakeup");
 
 		if (of_property_read_u32(pp, "debounce-interval",
 					&button->debounce_interval))
@@ -470,9 +466,7 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
 		return -ENOMEM;
 	}
 
-	bdev = devm_kzalloc(dev, sizeof(struct gpio_keys_button_dev) +
-		       pdata->nbuttons * sizeof(struct gpio_keys_button_data),
-		       GFP_KERNEL);
+	bdev = devm_kzalloc(dev, struct_size(bdev, data, pdata->nbuttons), GFP_KERNEL);
 	if (!bdev) {
 		dev_err(dev, "no memory for private data\n");
 		return -ENOMEM;

scripts/kernel_bump.sh

@@ -162,14 +162,14 @@ bump_kernel()
 
 	git commit \
 		--signoff \
-		--message "kernel/${platform_name}: Create kernel files for v${target_version} (from v${source_version})" \
+		--message "kernel/${platform_name}: create files for v${target_version} (from v${source_version})" \
 		--message 'This is an automatically generated commit.' \
 		--message 'When doing `git bisect`, consider `git bisect --skip`.'
 
 	git checkout 'HEAD~' "${_target_dir}"
 	git commit \
 		--signoff \
-		--message "kernel/${platform_name}: Restore kernel files for v${source_version}" \
+		--message "kernel/${platform_name}: restore files for v${source_version}" \
 		--message "$(printf "This is an automatically generated commit which aids following Kernel patch\nhistory, as git will see the move and copy as a rename thus defeating the\npurpose.\n\nFor the original discussion see:\nhttps://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html")"
 	git switch "${initial_branch:?Unable to switch back to original branch. Quitting.}"
 	GIT_EDITOR=true git merge --no-ff '__openwrt_kernel_files_mover'

target/linux/mediatek/dts/mt7981b-kebidumei-ax3000-u22.dts

@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+
+#include "mt7981b.dtsi"
+
+/ {
+	model = "Kebidumei AX3000-U22";
+	compatible = "kebidumei,ax3000-u22", "mediatek,mt7981b";
+
+	aliases {
+		label-mac-device = &gmac1;
+
+		led-boot = &led_status_green;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_green;
+		led-upgrade = &led_status_green;
+
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@40000000 {
+		reg = <0 0x40000000 0 0x10000000>;
+		device_type = "memory";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_LAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_red: led-1 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led-2 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_BLUE>;
+			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_green: led-3 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 34 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+
+	status = "okay";
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "gmii";
+		phy-handle = <&int_gbe_phy>;
+		nvmem-cells = <&macaddr_factory_e000 0>;
+		nvmem-cell-names = "mac-address";
+	};
+};
+
+&spi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_flash_pins>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+
+		spi-max-frequency = <52000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bl2";
+				reg = <0x00000 0x40000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "u-boot-env";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "factory";
+				reg = <0x50000 0xb0000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x1000>;
+					};
+
+					macaddr_factory_e000: macaddr@e000 {
+						compatible = "mac-base";
+						reg = <0xe000 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+
+				};
+			};
+
+			partition@100000 {
+				label = "fip";
+				reg = <0x100000 0x80000>;
+				read-only;
+			};
+
+			partition@180000 {
+				compatible = "denx,fit";
+				label = "firmware";
+				reg = <0x180000 0xe80000>;
+			};
+		};
+	};
+};
+
+&pio {
+	spi2_flash_pins: spi2-pins {
+		mux {
+			function = "spi";
+			groups = "spi2", "spi2_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+		};
+
+		conf-pd {
+			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		};
+	};
+};
+
+&wifi {
+	status = "okay";
+
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+};

target/linux/mediatek/dts/mt7988d-keenetic-kn-1812.dts

@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "mt7988d-keenetic-kn-1812.dtsi"
+
+/ {
+	model = "Keenetic KN-1812";
+	compatible = "keenetic,kn-1812", "mediatek,mt7988d";
+};

target/linux/mediatek/dts/mt7988d-keenetic-kn-1812.dtsi

@@ -0,0 +1,610 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+#include "mt7988a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+#include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
+
+/ {
+	aliases {
+		serial0 = &serial0;
+		label-mac-device = &gmac1;
+		led-boot = &power_led;
+		led-failsafe = &power_led;
+		led-running = &power_led;
+		led-upgrade = &power_led;
+	};
+
+	chosen {
+		stdout-path = &serial0;
+		bootargs = "console=ttyS0,115200n1 pci=pcie_bus_perf";
+	};
+
+	memory@40000000 {
+		reg = <0x0 0x40000000 0x0 0x40000000>;
+		device_type = "memory";
+	};
+
+	cpus {
+		/delete-node/ cpu@3;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		button-fn1 {
+			label = "fn1";
+			linux,code = <BTN_0>;
+			gpios = <&pio 29 GPIO_ACTIVE_LOW>;
+		};
+
+		button-fn2 {
+			label = "fn2";
+			linux,code = <BTN_1>;
+			gpios = <&pio 37 GPIO_ACTIVE_LOW>;
+		};
+
+		button-reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 60 GPIO_ACTIVE_LOW>;
+		};
+
+		button-wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 61 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		/* fn1 */
+		led-0 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_INDICATOR;
+			function-enumerator = <0>;
+			gpios = <&pio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		/* fn2 */
+		led-1 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_INDICATOR;
+			function-enumerator = <1>;
+			gpios = <&pio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		/* wifi */
+		led-2 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN;
+			gpios = <&pio 47 GPIO_ACTIVE_LOW>;
+		};
+
+		/* internet */
+		led-3 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WAN_ONLINE;
+			gpios = <&pio 48 GPIO_ACTIVE_LOW>;
+		};
+
+		/* power */
+		power_led: led-4 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+			gpios = <&pio 50 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+
+		/* usb2.0 hub GL850G */
+		usbhub {
+			gpio-export,name = "usbhub";
+			gpio-export,output = <1>;
+			gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
+		};
+
+		/* USB2.0 */
+		usb1power {
+			gpio-export,name = "usb1power";
+			gpio-export,output = <1>;
+			gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
+		};
+
+		/* USB3.2 Gen1 */
+		usb2power {
+			gpio-export,name = "usb2power";
+			gpio-export,output = <1>;
+			gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&firmware1 &storage1 &firmware2 &storage2>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "kernel";
+				reg = <0x0 0x600000>;
+			};
+
+			partition@400000 {
+				label = "ubi";
+				reg = <0x600000 0x0>;
+			};
+		};
+	};
+};
+
+/* configure uart */
+&serial0 {
+	status = "okay";
+};
+
+/* configure spi-nand */
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "okay";
+
+	/* Winbond W25N02KV (256M) */
+	spi_nand@0 {
+		compatible = "spi-nand";
+		reg = <0>;
+
+		spi-max-frequency = <52000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <4>;
+
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/* bl2 */
+			partition@0 {
+				label = "preloader";
+				reg = <0x0 0x80000>;
+				read-only;
+			};
+
+			/* fip */
+			partition@80000 {
+				label = "u-boot";
+				reg = <0x80000 0x200000>;
+				read-only;
+			};
+
+			partition@280000 {
+				label = "u-config";
+				reg = <0x280000 0x80000>;
+				read-only;
+			};
+
+			partition@300000 {
+				label = "rf-eeprom";
+				reg = <0x300000 0x400000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x1e00>;
+					};
+
+					/* lan mac */
+					macaddr_factory_4: macaddr@4 {
+						reg = <0x4 0x6>;
+					};
+
+					/* 5Ghz mac */
+					macaddr_factory_a: macaddr@a {
+						reg = <0xa 0x6>;
+					};
+
+					/* lan5 mac */
+					macaddr_factory_fffee: macaddr@fffee {
+						reg = <0xfffee 0x6>;
+					};
+
+					/* wan mac */
+					macaddr_factory_ffffa: macaddr@ffffa {
+						reg = <0xffffa 0x6>;
+					};
+				};
+			};
+
+			firmware1: partition@700000 {
+				label = "firmware_1";
+				reg = <0x700000 0x3800000>;
+			};
+
+			partition@3f00000 {
+				label = "config_1";
+				reg = <0x3f00000 0x80000>;
+				read-only;
+			};
+
+			partition@3f80000 {
+				label = "dump";
+				reg = <0x3f80000 0x80000>;
+				read-only;
+			};
+
+			storage1: partition@4000000 {
+				label = "storage_a";
+				reg = <0x4000000 0x3800000>;
+			};
+
+			partition@7800000 {
+				label = "u-state";
+				reg = <0x7800000 0x80000>;
+				read-only;
+			};
+
+			partition@7a80000 {
+				label = "u-config_res";
+				reg = <0x7a80000 0x80000>;
+				read-only;
+			};
+
+			partition@7b00000 {
+				label = "rf-eeprom_res";
+				reg = <0x7b00000 0x400000>;
+				read-only;
+			};
+
+			firmware2: partition@7f00000 {
+				label = "firmware_2";
+				reg = <0x7f00000 0x3800000>;
+			};
+
+			partition@b700000 {
+				label = "config_2";
+				reg = <0xb700000 0x80000>;
+				read-only;
+			};
+
+			storage2: partition@b780000 {
+				label = "storage_b";
+				reg = <0xb780000 0x3880000>;
+			};
+		};
+	};
+};
+
+/* configure switch */
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+	status = "okay";
+};
+
+/* lan1 */
+&gsw_port0 {
+	label = "lan1";
+};
+
+&gsw_phy0 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gbe0_led0_pins>;
+};
+
+&gsw_phy0_led0 {
+	status = "okay";
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+};
+
+/* lan2 */
+&gsw_port1 {
+	label = "lan2";
+};
+
+&gsw_phy1 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gbe1_led0_pins>;
+};
+
+&gsw_phy1_led0 {
+	status = "okay";
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+};
+
+/* lan3 */
+&gsw_port2 {
+	label = "lan3";
+};
+
+&gsw_phy2 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gbe2_led0_pins>;
+};
+
+&gsw_phy2_led0 {
+	status = "okay";
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+};
+
+/* lan4 */
+&gsw_port3 {
+	label = "lan4";
+};
+
+&gsw_phy3 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gbe3_led0_pins>;
+};
+
+&gsw_phy3_led0 {
+	status = "okay";
+	function = LED_FUNCTION_LAN;
+	color = <LED_COLOR_ID_GREEN>;
+};
+
+/* configure wan */
+&gmac1 {
+	nvmem-cells = <&macaddr_factory_ffffa>;
+	nvmem-cell-names = "mac-address";
+	label = "wan";
+	phy-mode = "internal";
+	phy-connection-type = "internal";
+	phy = <&int_2p5g_phy>;
+	status = "okay";
+};
+
+&int_2p5g_phy {
+	pinctrl-names = "i2p5gbe-led";
+	pinctrl-0 = <&i2p5gbe_led0_pins>;
+};
+
+&i2p5gbe_led0 {
+	color = <LED_COLOR_ID_GREEN>;
+	function = LED_FUNCTION_WAN;
+	status = "okay";
+};
+
+/* configure lan5 */
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio0_pins>;
+	status = "okay";
+};
+
+&mdio_bus {
+	phy27: ethernet-phy@1b {
+		/* RTL8261BE */
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1b>;
+
+		reset-gpios = <&pio 4 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <100000>;
+		reset-deassert-us = <100000>;
+	};
+};
+
+&gmac2 {
+	nvmem-cells = <&macaddr_factory_fffee>;
+	nvmem-cell-names = "mac-address";
+	label = "lan5";
+	phy-mode = "usxgmii";
+	phy-connection-type = "usxgmii";
+	phy = <&phy27>;
+	status = "okay";
+};
+
+/* configure power supply */
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+
+	rt5190a_64: rt5190a@64 {
+		compatible = "richtek,rt5190a";
+		reg = <0x64>;
+
+		vin2-supply = <&rt5190_buck1>;
+		vin3-supply = <&rt5190_buck1>;
+		vin4-supply = <&rt5190_buck1>;
+
+		regulators {
+			rt5190_buck1: buck1 {
+				regulator-name = "rt5190a-buck1";
+				regulator-min-microvolt = <5090000>;
+				regulator-max-microvolt = <5090000>;
+				regulator-allowed-modes =
+				<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck2 {
+				regulator-name = "vcore";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			rt5190_buck3: buck3 {
+				regulator-name = "vproc";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+			};
+
+			buck4 {
+				regulator-name = "rt5190a-buck4";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <850000>;
+				regulator-allowed-modes =
+				<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo {
+				regulator-name = "rt5190a-ldo";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&cpu0 {
+	proc-supply = <&rt5190_buck3>;
+};
+
+&cpu1 {
+	proc-supply = <&rt5190_buck3>;
+};
+
+&cpu2 {
+	proc-supply = <&rt5190_buck3>;
+};
+
+&cci {
+	proc-supply = <&rt5190_buck3>;
+};
+
+/* configure wifi chip */
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_1_pins>;
+	wifi-reset-gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+	wifi-reset-msleep = <100>;
+	status = "okay";
+
+	pcie@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		mt7996@0,0 {
+			reg = <0x0000 0 0 0 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			nvmem-cells = <&eeprom_factory_0>;
+			nvmem-cell-names = "eeprom";
+			ieee80211-freq-limit = <2400000 2500000>, <5170000 5835000>;
+
+			band@0 {
+				/* 2.4 GHz */
+				reg = <0>;
+				nvmem-cells = <&macaddr_factory_4>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			band@1 {
+				/* 5 GHz */
+				reg = <1>;
+				nvmem-cells = <&macaddr_factory_a>;
+				nvmem-cell-names = "mac-address";
+			};
+		};
+	};
+};
+
+/* configure pinmux settings */
+&pio {
+	mdio0_pins: mdio0-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio0";
+		};
+
+		conf {
+			groups = "mdc_mdio0";
+			drive-strength = <MTK_DRIVE_4mA>;
+		};
+	};
+
+	gbe0_led0_pins: gbe0-led0-pins {
+		mux {
+			function = "led";
+			groups = "gbe0_led0";
+		};
+	};
+
+	gbe1_led0_pins: gbe1-led0-pins {
+		mux {
+			function = "led";
+			groups = "gbe1_led0";
+		};
+	};
+
+	gbe2_led0_pins: gbe2-led0-pins {
+		mux {
+			function = "led";
+			groups = "gbe2_led0";
+		};
+	};
+
+	gbe3_led0_pins: gbe3-led0-pins {
+		mux {
+			function = "led";
+			groups = "gbe3_led0";
+		};
+	};
+
+	i2p5gbe_led0_pins: 2p5gbe-led0-pins {
+		mux {
+			function = "led";
+			groups = "2p5gbe_led0";
+		};
+	};
+
+	i2c0_pins: i2c0-pins-g0 {
+		mux {
+			function = "i2c";
+			groups = "i2c0_1";
+		};
+	};
+
+	pcie0_1_pins: pcie0-pins-g1 {
+		mux {
+			function = "pcie";
+			groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0";
+		};
+	};
+
+	spi0_flash_pins: spi0-flash-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+	};
+};
+
+/* configure usb */
+&ssusb1 {
+	status = "okay";
+};
+
+&tphy {
+	status = "okay";
+};

target/linux/mediatek/dts/mt7988d-netcraze-nc-1812.dts

@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "mt7988d-keenetic-kn-1812.dtsi"
+
+/ {
+	model = "Netcraze NC-1812";
+	compatible = "netcraze,nc-1812", "mediatek,mt7988d";
+};

target/linux/mediatek/filogic/base-files/etc/board.d/01_leds

@@ -58,6 +58,7 @@ bananapi,bpi-r4-lite)
 	ucidef_set_led_netdev "sfp0" "sfp0" "green:sfp" "sfp0" "link tx rx"
 	;;
 cudy,re3000-v1|\
+kebidumei,ax3000-u22|\
 wavlink,wl-wn573hx3)
 	ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0" "link tx rx"
 	;;
@@ -103,6 +104,12 @@ iptime,ax3000sm)
 iptime,ax7800m-6e)
 	ucidef_set_led_netdev "wan" "wan" "mdio-bus:06:blue:wan" "eth1" "link tx rx"
 	;;
+keenetic,kn-1812|\
+netcraze,nc-1812)
+	ucidef_set_led_netdev "wlan2g" "WLAN2G" "green:indicator-1" "phy0.0-ap0"
+	ucidef_set_led_netdev "wlan5g" "WLAN5G" "green:wlan" "phy0.1-ap0"
+	ucidef_set_led_netdev "internet" "internet" "green:wan-online" "wan" "link"
+	;;
 mercusys,mr80x-v3)
 	ucidef_set_led_netdev "lan1" "lan-1" "green:lan-1" "lan1" "link tx rx"
 	ucidef_set_led_netdev "lan2" "lan-2" "green:lan-2" "lan2" "link tx rx"

target/linux/mediatek/filogic/base-files/etc/board.d/02_network

@@ -107,6 +107,7 @@ mediatek_setup_interfaces()
 	cudy,ap3000outdoor-v1|\
 	cudy,ap3000-v1|\
 	cudy,re3000-v1|\
+	kebidumei,ax3000-u22|\
 	netgear,eax17|\
 	netgear,wax220|\
 	openfi,6c|\
@@ -141,6 +142,10 @@ mediatek_setup_interfaces()
 	yuncore,ax835)
 		ucidef_set_interfaces_lan_wan lan wan
 		;;
+	keenetic,kn-1812|\
+	netcraze,nc-1812)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "wan"
+		;;
 	mediatek,mt7986a-rfb)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan6" "eth1 wan"
 		;;

target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh

@@ -157,6 +157,7 @@ platform_do_upgrade() {
 		;;
 	cudy,re3000-v1|\
 	cudy,wr3000-v1|\
+	kebidumei,ax3000-u22|\
 	totolink,x6000r|\
 	wavlink,wl-wn573hx3|\
 	widelantech,wap430x|\

target/linux/mediatek/image/filogic.mk

@@ -1616,6 +1616,47 @@ define Device/jdcloud_re-cp-03
 endef
 TARGET_DEVICES += jdcloud_re-cp-03
 
+define Device/kebidumei_ax3000-u22
+  DEVICE_VENDOR := Kebidumei
+  DEVICE_MODEL := AX3000-U22
+  DEVICE_DTS := mt7981b-kebidumei-ax3000-u22
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS_LOADADDR := 0x43f00000
+  IMAGE_SIZE := 14848k
+  KERNEL_LOADADDR := 0x44000000
+  KERNEL := kernel-bin | lzma | \
+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+  DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
+  SUPPORTED_DEVICES += mediatek,mt7981-spim-nor-rfb
+endef
+TARGET_DEVICES += kebidumei_ax3000-u22
+
+define Device/keenetic_kn-1812-common
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := kmod-mt7992-firmware kmod-usb3 \
+		mt7988-2p5g-phy-firmware mt7988-wo-firmware
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_SIZE := 6144k
+  IMAGE_SIZE := 229888k
+  KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb | \
+	append-squashfs4-fakeroot
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | \
+	append-ubi | check-size | zyimage -d $$(ZYIMAGE_ID) -v "$$(DEVICE_MODEL)"
+endef
+
+define Device/keenetic_kn-1812
+  DEVICE_VENDOR := Keenetic
+  DEVICE_MODEL := KN-1812
+  DEVICE_DTS := mt7988d-keenetic-kn-1812
+  ZYIMAGE_ID := 0x801812
+  $(call Device/keenetic_kn-1812-common)
+endef
+TARGET_DEVICES += keenetic_kn-1812
+
 define Device/keenetic_kn-3711
   DEVICE_VENDOR := Keenetic
   DEVICE_MODEL := KN-3711
@@ -2030,6 +2071,15 @@ define Device/netcore_n60-pro
 endef
 TARGET_DEVICES += netcore_n60-pro
 
+define Device/netcraze_nc-1812
+  DEVICE_VENDOR := Netcraze
+  DEVICE_MODEL := NC-1812
+  DEVICE_DTS := mt7988d-netcraze-nc-1812
+  ZYIMAGE_ID := 0xC01812
+  $(call Device/keenetic_kn-1812-common)
+endef
+TARGET_DEVICES += netcraze_nc-1812
+
 define Device/netgear_eax17
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := EAX17

target/linux/mediatek/patches-6.12/966-pcie-mediatek-gen3-Add-WIFI-HW-reset-flow.patch

@@ -0,0 +1,88 @@
+From f566462daef92eb0074013e32d0332116fc3a2eb Mon Sep 17 00:00:00 2001
+From: Jianguo Zhang <jianguo.zhang@mediatek.com>
+Date: Tue, 14 Oct 2025 16:00:03 +0800
+Subject: [PATCH] pcie: mediatek-gen3: Add WIFI HW reset flow
+
+[Description]
+Add WIFI HW reset before PCIe host detects EP device for reboot.
+
+[Release-log]
+NA
+
+Signed-off-by: Jianguo Zhang <jianguo.zhang@mediatek.com>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 29 +++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -10,6 +10,8 @@
+ #include <linux/clk.h>
+ #include <linux/clk-provider.h>
+ #include <linux/delay.h>
++#include <linux/gpio.h>
++#include <linux/gpio/consumer.h>
+ #include <linux/iopoll.h>
+ #include <linux/irq.h>
+ #include <linux/irqchip/chained_irq.h>
+@@ -18,6 +20,7 @@
+ #include <linux/module.h>
+ #include <linux/msi.h>
+ #include <linux/of_device.h>
++#include <linux/of_gpio.h>
+ #include <linux/of_pci.h>
+ #include <linux/pci.h>
+ #include <linux/phy/phy.h>
+@@ -160,6 +163,8 @@ struct mtk_msi_set {
+  * @phy: PHY controller block
+  * @clks: PCIe clocks
+  * @num_clks: PCIe clocks count for this port
++ * @wifi_reset: reset pin for WIFI chip
++ * @wifi_reset_delay_ms: delay time for WIFI chip reset
+  * @irq: PCIe controller interrupt number
+  * @saved_irq_state: IRQ enable state saved at suspend time
+  * @irq_lock: lock protecting IRQ register access
+@@ -181,6 +186,9 @@ struct mtk_gen3_pcie {
+ 	struct clk_bulk_data *clks;
+ 	int num_clks;
+ 
++	struct gpio_desc *wifi_reset;
++	u32 wifi_reset_delay_ms;
++
+ 	int irq;
+ 	u32 saved_irq_state;
+ 	raw_spinlock_t irq_lock;
+@@ -402,6 +410,12 @@ static int mtk_pcie_startup_port(struct
+ 	val |= PCIE_DISABLE_DVFSRC_VLT_REQ;
+ 	writel_relaxed(val, pcie->base + PCIE_MISC_CTRL_REG);
+ 
++	if (pcie->wifi_reset) {
++		gpiod_set_value_cansleep(pcie->wifi_reset, 1);
++		msleep(pcie->wifi_reset_delay_ms);
++		gpiod_set_value_cansleep(pcie->wifi_reset, 0);
++	}
++
+ 	/* Assert all reset signals */
+ 	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+ 	val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB;
+@@ -864,6 +878,20 @@ static int mtk_pcie_parse_port(struct mt
+ 		return pcie->num_clks;
+ 	}
+ 
++	ret = of_property_read_u32(dev->of_node, "wifi-reset-msleep",
++				   &pcie->wifi_reset_delay_ms);
++	if (!ret) {
++		pcie->wifi_reset = devm_gpiod_get_optional(dev, "wifi-reset",
++							   GPIOD_OUT_LOW);
++		if (IS_ERR(pcie->wifi_reset)) {
++			ret = PTR_ERR(pcie->wifi_reset);
++			if (ret != -EPROBE_DEFER)
++				dev_err(dev,
++					"failed to request WIFI reset gpio\n");
++			return ret;
++		}
++	}
++
+ 	return 0;
+ }
+ 

target/linux/ramips/image/mt7621.mk

@@ -742,6 +742,16 @@ define Device/cudy_ap1300-outdoor-v1
 endef
 TARGET_DEVICES += cudy_ap1300-outdoor-v1
 
+define Device/cudy_c200p
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := C200P
+  IMAGE_SIZE := 15872k
+  UIMAGE_NAME := R74
+  DEVICE_PACKAGES := -uboot-envtools -wpad-basic-mbedtls kmod-usb3
+endef
+TARGET_DEVICES += cudy_c200p
+
 define Device/cudy_m1300-v2
   $(Device/dsa-migration)
   IMAGE_SIZE := 15872k
@@ -765,6 +775,16 @@ define Device/cudy_m1800
 endef
 TARGET_DEVICES += cudy_m1800
 
+define Device/cudy_r700
+  $(Device/dsa-migration)
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := R700
+  IMAGE_SIZE := 15872k
+  UIMAGE_NAME := R29
+  DEVICE_PACKAGES := -uboot-envtools -wpad-basic-mbedtls
+endef
+TARGET_DEVICES += cudy_r700
+
 define Device/cudy_wr1300-v1
   $(Device/dsa-migration)
   IMAGE_SIZE := 15872k
@@ -811,26 +831,6 @@ define Device/cudy_wr2100
 endef
 TARGET_DEVICES += cudy_wr2100
 
-define Device/cudy_r700
-  $(Device/dsa-migration)
-  DEVICE_VENDOR := Cudy
-  DEVICE_MODEL := R700
-  IMAGE_SIZE := 15872k
-  UIMAGE_NAME := R29
-  DEVICE_PACKAGES := -uboot-envtools -wpad-basic-mbedtls
-endef
-TARGET_DEVICES += cudy_r700
-
-define Device/cudy_c200p
-  $(Device/dsa-migration)
-  DEVICE_VENDOR := Cudy
-  DEVICE_MODEL := C200P
-  IMAGE_SIZE := 15872k
-  UIMAGE_NAME := R74
-  DEVICE_PACKAGES := -uboot-envtools -wpad-basic-mbedtls kmod-usb3
-endef
-TARGET_DEVICES += cudy_c200p
-
 define Device/cudy_x6-v1
   $(Device/dsa-migration)
   IMAGE_SIZE := 32256k

target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts

@@ -84,9 +84,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -107,7 +104,6 @@
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;
@@ -117,7 +113,6 @@
 			reg = <26>;
 			label = "lan10";
 			pcs-handle = <&serdes5>;
-			phy-handle = <&phy26>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp1>;

target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi

@@ -180,9 +180,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -204,7 +201,6 @@
 			label = "lan9";
 			pcs-handle = <&serdes4>;
 			phy-mode = "1000base-x";
-			phy-handle = <&phy24>;
 			managed = "in-band-status";
 			sfp = <&sfp0>;
 		};
@@ -214,7 +210,6 @@
 			label = "lan10";
 			pcs-handle = <&serdes5>;
 			phy-mode = "1000base-x";
-			phy-handle = <&phy26>;
 			managed = "in-band-status";
 			sfp = <&sfp1>;
 		};

target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi

@@ -66,9 +66,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -89,7 +86,6 @@
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;
@@ -99,7 +95,6 @@
 			reg = <26>;
 			label = "lan10";
 			pcs-handle = <&serdes5>;
-			phy-handle = <&phy26>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp1>;

target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts

@@ -157,8 +157,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -179,7 +177,6 @@
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;
@@ -189,7 +186,6 @@
 			reg = <26>;
 			label = "lan10";
 			pcs-handle = <&serdes5>;
-			phy-handle = <&phy26>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp1>;

target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts

@@ -53,7 +53,18 @@
 &switch0 {
 	ports {
 		SWITCH_PORT(16, 9, qsgmii)
+
 		/* TODO: fixed link SFP is not right */
-		SWITCH_SFP_PORT(24, 10, rgmii-id)
+		port24: port@24 {
+			reg = <24>;
+			label = SWITCH_PORT_LABEL(10);
+			pcs-handle = <&serdes4>;
+			phy-handle = <&phy24>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
 	};
 };

target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts

@@ -49,15 +49,29 @@
 	status = "okay";
 };
 
-&mdio_bus0 {
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
-};
-
 &switch0 {
 	ports {
 		/* TODO: fixed link SFP is not right */
-		SWITCH_SFP_PORT(24, 9, 1000base-x)
-		SWITCH_SFP_PORT(26, 10, 1000base-x)
+
+		port24: port@24 {
+			reg = <24>;
+			label = SWITCH_PORT_LABEL(9);
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+		port26: port@26 {
+			reg = <26>;
+			label = SWITCH_PORT_LABEL(10);
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
 	};
 };

target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts

@@ -83,8 +83,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
 };
 
 &switch0 {
@@ -105,7 +103,6 @@
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;

target/linux/realtek/dts/rtl8380_tplink_sg2008p-v1.dts

@@ -11,18 +11,3 @@
 	status = "disabled";
 };
 
-&phy24 {
-	status = "disabled";
-};
-
-&phy26 {
-	status = "disabled";
-};
-
-&port24 {
-	status = "disabled";
-};
-
-&port26 {
-	status = "disabled";
-};

target/linux/realtek/dts/rtl8380_tplink_sg2210p-v3.dts

@@ -7,10 +7,29 @@
 	model = "TP-Link SG2210P v3";
 };
 
-&port24 {
-	label = "lan-sfp2";
+&switch0 {
+	ports {
+		port24: port@24 {
+			reg = <24>;
+			label = "lan-sfp2";
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
+		port26: port@26 {
+			reg = <26>;
+			label = "lan-sfp1";
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
 };
 
-&port26 {
-	label = "lan-sfp1";
-};

target/linux/realtek/dts/rtl8380_tplink_sg2xxx.dtsi

@@ -143,9 +143,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &ethernet0 {
@@ -168,8 +165,26 @@
 		SWITCH_PORT(8, 8, internal)
 
 		/* TODO: fixed link SFP is not right */
-		SWITCH_SFP_PORT(24, 9, 1000base-x)
-		SWITCH_SFP_PORT(26, 10, 1000base-x)
+		port24: port@24 {
+			reg = <24>;
+			label = SWITCH_PORT_LABEL(9);
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+		port26: port@26 {
+			reg = <26>;
+			label = SWITCH_PORT_LABEL(10);
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp-a1.dts

@@ -52,18 +52,12 @@
 	status = "okay";
 };
 
-&mdio_bus0 {
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
-};
-
 &switch0 {
 	ports {
 		port@24 {
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;
@@ -73,7 +67,6 @@
 			reg = <26>;
 			label = "lan10";
 			pcs-handle = <&serdes5>;
-			phy-handle = <&phy26>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp1>;

target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts

@@ -229,14 +229,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -247,10 +247,10 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(24, 17, qsgmii)
-		SWITCH_PORT(25, 18, qsgmii)
-		SWITCH_PORT(26, 19, qsgmii)
-		SWITCH_PORT(27, 20, qsgmii)
+		SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 20, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts

@@ -83,9 +83,6 @@
 	INTERNAL_PHY(13)
 	INTERNAL_PHY(14)
 	INTERNAL_PHY(15)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -106,7 +103,6 @@
 			reg = <24>;
 			label = "lan9";
 			pcs-handle = <&serdes4>;
-			phy-handle = <&phy24>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp0>;
@@ -116,7 +112,6 @@
 			reg = <26>;
 			label = "lan10";
 			pcs-handle = <&serdes5>;
-			phy-handle = <&phy26>;
 			phy-mode = "1000base-x";
 			managed = "in-band-status";
 			sfp = <&sfp1>;

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts

@@ -39,14 +39,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -57,10 +57,10 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(24, 17, qsgmii)
-		SWITCH_PORT(25, 18, qsgmii)
-		SWITCH_PORT(26, 19, qsgmii)
-		SWITCH_PORT(27, 20, qsgmii)
+		SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 20, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts

@@ -39,14 +39,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -57,10 +57,10 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(24, 17, qsgmii)
-		SWITCH_PORT(25, 18, qsgmii)
-		SWITCH_PORT(26, 19, qsgmii)
-		SWITCH_PORT(27, 20, qsgmii)
+		SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 20, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts

@@ -72,9 +72,6 @@
 	EXTERNAL_PHY(21)
 	EXTERNAL_PHY(22)
 	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
@@ -82,14 +79,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -100,14 +97,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@24 {
 			reg = <24>;

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi

@@ -40,14 +40,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -58,19 +58,19 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
+		SWITCH_PORT_SDS(24, 25, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_hpe_1920-16g.dts

@@ -21,19 +21,19 @@
 		SWITCH_PORT(14, 7, internal)
 		SWITCH_PORT(15, 8, internal)
 
-		SWITCH_PORT(16, 9, qsgmii)
-		SWITCH_PORT(17, 10, qsgmii)
-		SWITCH_PORT(18, 11, qsgmii)
-		SWITCH_PORT(19, 12, qsgmii)
-		SWITCH_PORT(20, 13, qsgmii)
-		SWITCH_PORT(21, 14, qsgmii)
-		SWITCH_PORT(22, 15, qsgmii)
-		SWITCH_PORT(23, 16, qsgmii)
+		SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 16, 3, qsgmii)
 
-		SWITCH_PORT(24, 17, qsgmii)
-		SWITCH_PORT(25, 18, qsgmii)
-		SWITCH_PORT(26, 19, qsgmii)
-		SWITCH_PORT(27, 20, qsgmii)
+		SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 20, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi

@@ -23,14 +23,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -41,19 +41,19 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
+		SWITCH_PORT_SDS(24, 25, 4, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 4, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 4, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 4, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts

@@ -121,14 +121,14 @@
 		SWITCH_PORT(14, 7, internal)
 		SWITCH_PORT(15, 8, internal)
 
-		SWITCH_PORT(16, 9, qsgmii)
-		SWITCH_PORT(17, 10, qsgmii)
-		SWITCH_PORT(18, 11, qsgmii)
-		SWITCH_PORT(19, 12, qsgmii)
-		SWITCH_PORT(20, 13, qsgmii)
-		SWITCH_PORT(21, 14, qsgmii)
-		SWITCH_PORT(22, 15, qsgmii)
-		SWITCH_PORT(23, 16, qsgmii)
+		SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 16, 3, qsgmii)
 
 		port@24 {
 			reg = <24>;

target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts

@@ -155,14 +155,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -173,14 +173,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts

@@ -140,14 +140,14 @@
 		SWITCH_PORT(14, 7, internal)
 		SWITCH_PORT(15, 8, internal)
 
-		SWITCH_PORT(16, 9, qsgmii)
-		SWITCH_PORT(17, 10, qsgmii)
-		SWITCH_PORT(18, 11, qsgmii)
-		SWITCH_PORT(19, 12, qsgmii)
-		SWITCH_PORT(20, 13, qsgmii)
-		SWITCH_PORT(21, 14, qsgmii)
-		SWITCH_PORT(22, 15, qsgmii)
-		SWITCH_PORT(23, 16, qsgmii)
+		SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 16, 3, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts

@@ -141,14 +141,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -159,14 +159,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts

@@ -128,14 +128,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -146,14 +146,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@28 {
 			ethernet = <&ethernet0>;

target/linux/realtek/dts/rtl8382_zyxel_gs1900-16-a1.dts

@@ -21,14 +21,14 @@
 
 &switch0 {
 	ports {
-		SWITCH_PORT(16, 9, qsgmii)
-		SWITCH_PORT(17, 10, qsgmii)
-		SWITCH_PORT(18, 11, qsgmii)
-		SWITCH_PORT(19, 12, qsgmii)
-		SWITCH_PORT(20, 13, qsgmii)
-		SWITCH_PORT(21, 14, qsgmii)
-		SWITCH_PORT(22, 15, qsgmii)
-		SWITCH_PORT(23, 16, qsgmii)
+		SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 16, 3, qsgmii)
 	};
 };
 

target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts

@@ -72,21 +72,18 @@
 	EXTERNAL_PHY(21)
 	EXTERNAL_PHY(22)
 	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
 	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -97,14 +94,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@24 {
 			reg = <24>;

target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e-a1.dts

@@ -30,14 +30,14 @@
 
 &switch0 {
 	ports {
-		SWITCH_PORT(1, 1, qsgmii)
-		SWITCH_PORT(0, 2, qsgmii)
-		SWITCH_PORT(3, 3, qsgmii)
-		SWITCH_PORT(2, 4, qsgmii)
-		SWITCH_PORT(5, 5, qsgmii)
-		SWITCH_PORT(4, 6, qsgmii)
-		SWITCH_PORT(7, 7, qsgmii)
-		SWITCH_PORT(6, 8, qsgmii)
+		SWITCH_PORT_SDS(1, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(0, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(5, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(4, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 8, 1, qsgmii)
 
 		SWITCH_PORT(9, 9, internal)
 		SWITCH_PORT(8, 10, internal)
@@ -48,14 +48,14 @@
 		SWITCH_PORT(15, 15, internal)
 		SWITCH_PORT(14, 16, internal)
 
-		SWITCH_PORT(17, 17, qsgmii)
-		SWITCH_PORT(16, 18, qsgmii)
-		SWITCH_PORT(19, 19, qsgmii)
-		SWITCH_PORT(18, 20, qsgmii)
-		SWITCH_PORT(21, 21, qsgmii)
-		SWITCH_PORT(20, 22, qsgmii)
-		SWITCH_PORT(23, 23, qsgmii)
-		SWITCH_PORT(22, 24, qsgmii)
+		SWITCH_PORT_SDS(17, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(16, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(21, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(20, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 24, 3, qsgmii)
 	};
 };
 

target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep-a1.dts

@@ -34,14 +34,14 @@
 
 &switch0 {
 	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -52,13 +52,13 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 	};
 };

target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-a1.dts

@@ -72,21 +72,18 @@
 	EXTERNAL_PHY(21)
 	EXTERNAL_PHY(22)
 	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
 	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -97,14 +94,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 		port@24 {
 			reg = <24>;

target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-b1.dts

@@ -68,21 +68,18 @@
 	EXTERNAL_PHY(21)
 	EXTERNAL_PHY(22)
 	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY(24)
-	INTERNAL_PHY(26)
 };
 
 &switch0 {
 	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
 
 		SWITCH_PORT(8, 9, internal)
 		SWITCH_PORT(9, 10, internal)
@@ -93,14 +90,14 @@
 		SWITCH_PORT(14, 15, internal)
 		SWITCH_PORT(15, 16, internal)
 
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
+		SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 3, qsgmii)
 
 
 		port@24 {

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c

@@ -369,14 +369,6 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
 			continue;
 		}
 
-		/* Check for the integrated SerDes of the RTL8380M first */
-		if (of_property_read_bool(phy_node, "phy-is-integrated")
-		    && priv->id == 0x8380 && pn >= 24) {
-			pr_debug("----> FOUND A SERDES\n");
-			priv->ports[pn].phy = PHY_RTL838X_SDS;
-			continue;
-		}
-
 		if (of_property_read_bool(phy_node, "phy-is-integrated") &&
 		    !of_property_read_bool(phy_node, "sfp")) {
 			priv->ports[pn].phy = PHY_RTL8218B_INT;
@@ -408,13 +400,6 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
 		sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
 	}
 
-	/* Power on fibre ports and reset them if necessary */
-	if (priv->ports[24].phy == PHY_RTL838X_SDS) {
-		pr_debug("Powering on fibre ports & reset\n");
-		rtl8380_sds_power(24, 1);
-		rtl8380_sds_power(26, 1);
-	}
-
 	return 0;
 }
 

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c

@@ -652,43 +652,6 @@ static struct phylink_pcs *rtldsa_phylink_mac_select_pcs(struct dsa_switch *ds,
 	return priv->pcs[port];
 }
 
-static void rtl83xx_config_interface(int port, phy_interface_t interface)
-{
-	u32 old, int_shift, sds_shift;
-
-	switch (port) {
-	case 24:
-		int_shift = 0;
-		sds_shift = 5;
-		break;
-	case 26:
-		int_shift = 3;
-		sds_shift = 0;
-		break;
-	default:
-		return;
-	}
-
-	old = sw_r32(RTL838X_SDS_MODE_SEL);
-	switch (interface) {
-	case PHY_INTERFACE_MODE_1000BASEX:
-		if ((old >> sds_shift & 0x1f) == 4)
-			return;
-		sw_w32_mask(0x7 << int_shift, 1 << int_shift, RTL838X_INT_MODE_CTRL);
-		sw_w32_mask(0x1f << sds_shift, 4 << sds_shift, RTL838X_SDS_MODE_SEL);
-		break;
-	case PHY_INTERFACE_MODE_SGMII:
-		if ((old >> sds_shift & 0x1f) == 2)
-			return;
-		sw_w32_mask(0x7 << int_shift, 2 << int_shift, RTL838X_INT_MODE_CTRL);
-		sw_w32_mask(0x1f << sds_shift, 2 << sds_shift, RTL838X_SDS_MODE_SEL);
-		break;
-	default:
-		return;
-	}
-	pr_debug("configured port %d for interface %s\n", port, phy_modes(interface));
-}
-
 static void rtldsa_83xx_phylink_get_caps(struct dsa_switch *ds, int port,
 					 struct phylink_config *config)
 {
@@ -754,7 +717,7 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
 	mcr = sw_r32(priv->r->mac_force_mode_ctrl(port));
 	if (mode == MLO_AN_PHY || phylink_autoneg_inband(mode)) {
 		pr_debug("port %d PHY autonegotiates\n", port);
-		rtl83xx_config_interface(port, state->interface);
+
 		mcr |= RTL838X_NWAY_EN;
 	} else {
 		mcr &= ~RTL838X_NWAY_EN;

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c

@@ -1810,31 +1810,3 @@ void rtl838x_vlan_profile_dump(int profile)
 		 profile, p & 1, (p >> 1) & 0x1ff, (p >> 10) & 0x1ff, (p >> 19) & 0x1ff);
 }
 
-void rtl8380_sds_rst(int mac)
-{
-	u32 offset = (mac == 24) ? 0 : 0x100;
-
-	sw_w32_mask(1 << 11, 0, RTL838X_SDS4_FIB_REG0 + offset);
-	sw_w32_mask(0x3, 0, RTL838X_SDS4_REG28 + offset);
-	sw_w32_mask(0x3, 0x3, RTL838X_SDS4_REG28 + offset);
-	sw_w32_mask(0, 0x1 << 6, RTL838X_SDS4_DUMMY0 + offset);
-	sw_w32_mask(0x1 << 6, 0, RTL838X_SDS4_DUMMY0 + offset);
-	pr_debug("SERDES reset: %d\n", mac);
-}
-
-int rtl8380_sds_power(int mac, int val)
-{
-	u32 mode = (val == 1) ? 0x4 : 0x9;
-	u32 offset = (mac == 24) ? 5 : 0;
-
-	if ((mac != 24) && (mac != 26)) {
-		pr_err("%s: not a fibre port: %d\n", __func__, mac);
-		return -1;
-	}
-
-	sw_w32_mask(0x1f << offset, mode << offset, RTL838X_SDS_MODE_SEL);
-
-	rtl8380_sds_rst(mac);
-
-	return 0;
-}

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h

@@ -21,10 +21,6 @@
 #define RTL930X_MAC_FORCE_MODE_CTRL		(0xCA1C)
 #define RTL931X_MAC_FORCE_MODE_CTRL		(0x0DCC)
 
-#define RTL838X_DMY_REG31			(0x3b28)
-#define RTL838X_SDS_MODE_SEL			(0x0028)
-#define RTL838X_SDS_CFG_REG			(0x0034)
-#define RTL838X_INT_MODE_CTRL			(0x005c)
 #define RTL838X_PORT_ISO_CTRL(port)		(0x4100 + ((port) << 2))
 #define RTL839X_PORT_ISO_CTRL(port)		(0x1400 + ((port) << 3))
 
@@ -54,12 +50,6 @@
 #define RTL839X_SDS12_13_PWR0			(0xb880)
 #define RTL839X_SDS12_13_PWR1			(0xb980)
 
-/* Registers of the internal Serdes of the 8380 */
-#define RTL838X_SDS4_FIB_REG0			(0xF800)
-#define RTL838X_SDS4_REG28			(0xef80)
-#define RTL838X_SDS4_DUMMY0			(0xef8c)
-#define RTL838X_SDS5_EXT_REG6			(0xf18c)
-
 /* VLAN registers */
 #define RTL838X_VLAN_CTRL			(0x3A74)
 #define RTL838X_VLAN_PROFILE(idx)		(0x3A88 + ((idx) << 2))

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h

@@ -162,8 +162,6 @@ u32 rtl838x_hash(struct rtl838x_switch_priv *priv, u64 seed);
 irqreturn_t rtl838x_switch_irq(int irq, void *dev_id);
 void rtl8380_get_version(struct rtl838x_switch_priv *priv);
 void rtl838x_vlan_profile_dump(int index);
-void rtl8380_sds_rst(int mac);
-int rtl8380_sds_power(int mac, int val);
 void rtl838x_print_matrix(void);
 
 /* RTL839x-specific */

target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c

@@ -51,6 +51,13 @@
 #define RTPCS_931X_MAC_RX_PAUSE_STS		0x0f00
 #define RTPCS_931X_MAC_TX_PAUSE_STS		0x0ef8
 
+#define RTPCS_838X_SDS_CFG_REG			0x34
+#define RTPCS_838X_RST_GLB_CTRL_0		0x3c
+#define RTPCS_838X_SDS_MODE_SEL			0x0028
+#define RTPCS_838X_INT_RW_CTRL			0x0058
+#define RTPCS_838X_INT_MODE_CTRL		0x005c
+#define RTPCS_838X_PLL_CML_CTRL			0x0ff8
+
 #define RTPCS_93XX_MAC_LINK_SPD_BITS		4
 
 #define RTL93XX_MODEL_NAME_INFO			(0x0004)
@@ -122,6 +129,7 @@ struct rtpcs_config {
 	int mac_rx_pause_sts;
 	int mac_tx_pause_sts;
 	const struct phylink_pcs_ops *pcs_ops;
+	int (*init_serdes_common)(struct rtpcs_ctrl *ctrl);
 	int (*set_autoneg)(struct rtpcs_ctrl *ctrl, int sds, unsigned int neg_mode);
 	int (*setup_serdes)(struct rtpcs_ctrl *ctrl, int sds, phy_interface_t mode);
 };
@@ -213,6 +221,288 @@ static struct rtpcs_link *rtpcs_phylink_pcs_to_link(struct phylink_pcs *pcs)
 
 /* Variant-specific functions */
 
+/* RTL838X */
+
+static void rtpcs_838x_sds_patch_01_qsgmii_6275b(struct rtpcs_ctrl *ctrl)
+{
+	rtpcs_sds_write(ctrl, 0, 1, 3, 0xf46f);
+	rtpcs_sds_write(ctrl, 0, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 1, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 0, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 1, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 0, 1, 17, 0xb7c9);
+	rtpcs_sds_write(ctrl, 1, 1, 11, 0x482);
+	rtpcs_sds_write(ctrl, 1, 1, 10, 0x80c7);
+	rtpcs_sds_write(ctrl, 0, 1, 18, 0xab8e);
+	rtpcs_sds_write(ctrl, 0, 1, 11, 0x482);
+	rtpcs_sds_write(ctrl, 0, 1, 19, 0x24ab);
+	rtpcs_sds_write(ctrl, 1, 1, 17, 0x4208);
+	rtpcs_sds_write(ctrl, 1, 1, 18, 0xc208);
+	rtpcs_sds_write(ctrl, 0, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 1, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 0, 1, 14, 0xfcc2);
+	rtpcs_sds_write(ctrl, 1, 1, 14, 0xfcc2);
+
+	rtpcs_sds_write(ctrl, 0, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 0, 1, 9, 0x8c64);
+
+	rtpcs_sds_write(ctrl, 1, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 1, 1, 9, 0x8c64);
+}
+
+static void rtpcs_838x_sds_patch_23_qsgmii_6275b(struct rtpcs_ctrl *ctrl)
+{
+	rtpcs_sds_write(ctrl, 2, 1, 3, 0xf46d);
+	rtpcs_sds_write(ctrl, 2, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 3, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 2, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 3, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 2, 1, 17, 0xb7c9);
+	rtpcs_sds_write(ctrl, 2, 1, 18, 0xab8e);
+	rtpcs_sds_write(ctrl, 2, 1, 11, 0x482);
+	rtpcs_sds_write(ctrl, 3, 1, 11, 0x482);
+	rtpcs_sds_write(ctrl, 2, 1, 19, 0x24ab);
+	rtpcs_sds_write(ctrl, 3, 1, 17, 0x4208);
+	rtpcs_sds_write(ctrl, 3, 1, 18, 0xc208);
+	rtpcs_sds_write(ctrl, 2, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 3, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 2, 1, 14, 0xfcc2);
+	rtpcs_sds_write(ctrl, 3, 1, 14, 0xfcc2);
+
+	rtpcs_sds_write(ctrl, 2, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 2, 1, 9, 0x8c64);
+
+	rtpcs_sds_write(ctrl, 3, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 3, 1, 9, 0x8c64);
+}
+
+static void rtpcs_838x_sds_patch_4_fiber_6275b(struct rtpcs_ctrl *ctrl)
+{
+	rtpcs_sds_write(ctrl, 4, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 4, 1, 11, 0x1482);
+	rtpcs_sds_write(ctrl, 4, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 4, 1, 10, 0xc3);
+	rtpcs_sds_write(ctrl, 4, 1, 17, 0xb7c9);
+	rtpcs_sds_write(ctrl, 4, 1, 18, 0xab8e);
+	rtpcs_sds_write(ctrl, 4, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 4, 1, 14, 0xfcc2);
+
+	rtpcs_sds_write(ctrl, 4, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 4, 1, 9, 0x8c64);
+}
+
+static void rtpcs_838x_sds_patch_4_qsgmii_6275b(struct rtpcs_ctrl *ctrl)
+{
+	rtpcs_sds_write(ctrl, 4, 1, 3, 0xf46d);
+	rtpcs_sds_write(ctrl, 4, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 4, 1, 11, 0x0482);
+	rtpcs_sds_write(ctrl, 4, 1, 6, 0x20d8);
+	rtpcs_sds_write(ctrl, 4, 1, 10, 0x58c7);
+	rtpcs_sds_write(ctrl, 4, 1, 17, 0xb7c9);
+	rtpcs_sds_write(ctrl, 4, 1, 18, 0xab8e);
+	rtpcs_sds_write(ctrl, 4, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 4, 1, 14, 0xfcc2);
+
+	rtpcs_sds_write(ctrl, 4, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 4, 1, 9, 0x8c64);
+}
+
+static void rtpcs_838x_sds_patch_5_fiber_6275b(struct rtpcs_ctrl *ctrl)
+{
+	rtpcs_sds_write(ctrl, 5, 1, 2, 0x85fa);
+	rtpcs_sds_write(ctrl, 5, 1, 3, 0x00);
+	rtpcs_sds_write(ctrl, 5, 1, 4, 0xdccc);
+	rtpcs_sds_write(ctrl, 5, 1, 5, 0x00);
+	rtpcs_sds_write(ctrl, 5, 1, 6, 0x3600);
+	rtpcs_sds_write(ctrl, 5, 1, 7, 0x03);
+	rtpcs_sds_write(ctrl, 5, 1, 8, 0x79aa);
+	rtpcs_sds_write(ctrl, 5, 1, 9, 0x8c64);
+	rtpcs_sds_write(ctrl, 5, 1, 10, 0xc3);
+	rtpcs_sds_write(ctrl, 5, 1, 11, 0x1482);
+	rtpcs_sds_write(ctrl, 5, 2, 24, 0x14aa);
+	rtpcs_sds_write(ctrl, 5, 2, 25, 0x303);
+	rtpcs_sds_write(ctrl, 5, 1, 14, 0xf002);
+	rtpcs_sds_write(ctrl, 5, 2, 27, 0x4bf);
+
+	rtpcs_sds_write(ctrl, 5, 1, 9, 0x8e64);
+	rtpcs_sds_write(ctrl, 5, 1, 9, 0x8c64);
+}
+
+static void rtpcs_838x_sds_reset(struct rtpcs_ctrl *ctrl, u32 sds)
+{
+	rtpcs_sds_write_bits(ctrl, sds, 2, 0, 11, 11, 0x0);	/* FIB_REG0 CFG_FIB_PDOWN */
+
+	/* analog reset */
+	rtpcs_sds_write_bits(ctrl, sds, 0, 0, 1, 0, 0x0);	/* REG0 EN_RX/EN_TX */
+	rtpcs_sds_write_bits(ctrl, sds, 0, 0, 1, 0, 0x3);	/* REG0 EN_RX/EN_TX */
+
+	/* digital reset */
+	rtpcs_sds_write_bits(ctrl, sds, 0, 3, 6, 6, 0x1);	/* REG3 SOFT_RST */
+	rtpcs_sds_write_bits(ctrl, sds, 0, 3, 6, 6, 0x0);	/* REG3 SOFT_RST */
+
+	dev_info(ctrl->dev, "SerDes %d reset\n", sds);
+}
+
+static bool rtpcs_838x_sds_is_mode_supported(u32 sds, phy_interface_t mode)
+{
+	switch (sds) {
+	case 0 ... 3:
+		return mode == PHY_INTERFACE_MODE_QSGMII;
+	case 4:
+		return mode == PHY_INTERFACE_MODE_QSGMII ||
+		       mode == PHY_INTERFACE_MODE_SGMII ||
+		       mode == PHY_INTERFACE_MODE_1000BASEX;
+	case 5:
+		return mode == PHY_INTERFACE_MODE_SGMII ||
+		       mode == PHY_INTERFACE_MODE_1000BASEX;
+	default:
+		return false;
+	}
+}
+
+static int rtpcs_838x_sds_power(struct rtpcs_ctrl *ctrl, u32 sds, bool power_on)
+{
+	u8 val = power_on ? 0 : BIT(sds);
+	int ret;
+
+	ret = regmap_write_bits(ctrl->map, RTPCS_838X_SDS_CFG_REG, BIT(sds), val);
+	if (ret)
+		return ret;
+
+	if (sds >= 4)
+		ret = regmap_write_bits(ctrl->map, RTPCS_838X_SDS_CFG_REG,
+					BIT(sds) << 2, val << 2); /* SDS*_PHY_MODE */
+
+	return ret;
+}
+
+static int rtpcs_838x_sds_set_mode(struct rtpcs_ctrl *ctrl, u32 sds,
+				   phy_interface_t mode)
+{
+	u8 sds_mode_shift, int_mode_shift;
+	u32 sds_mode_val, int_mode_val;
+
+	switch (mode) {
+	case PHY_INTERFACE_MODE_1000BASEX:
+		sds_mode_val = 0x4;
+		int_mode_val = 0x1;
+		break;
+	case PHY_INTERFACE_MODE_SGMII:
+		sds_mode_val = 0x2;
+		int_mode_val = 0x2;
+		break;
+	case PHY_INTERFACE_MODE_QSGMII:
+		sds_mode_val = 0x6;
+		int_mode_val = 0x5;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Configure SerDes module mode (all SDS 0-5) */
+	sds_mode_shift = (5 - sds) * 5;
+	regmap_write_bits(ctrl->map, RTPCS_838X_SDS_MODE_SEL,
+			  0x1f << sds_mode_shift, sds_mode_val << sds_mode_shift);
+
+	/* Configure MAC interface mode (only SDS 4-5) */
+	if (sds >= 4) {
+		int_mode_shift = (sds == 5) ? 3 : 0;
+		regmap_write_bits(ctrl->map, RTPCS_838X_INT_MODE_CTRL,
+				  0x7 << int_mode_shift, int_mode_val << int_mode_shift);
+	}
+
+	return 0;
+}
+
+static int rtpcs_838x_sds_patch(struct rtpcs_ctrl *ctrl, u32 sds,
+				phy_interface_t mode)
+{
+	rtpcs_sds_write(ctrl, sds, 0, 1, 0xf00);
+	mdelay(1);
+	rtpcs_sds_write(ctrl, sds, 0, 2, 0x7060);
+	mdelay(1);
+
+	if (sds >= 4) {
+		rtpcs_sds_write(ctrl, sds, 2, 30, 0x71e);
+		mdelay(1);
+		rtpcs_sds_write(ctrl, sds, 0, 4, 0x74d);
+		mdelay(1);
+	}
+
+	switch (mode) {
+	case PHY_INTERFACE_MODE_1000BASEX:
+		if (sds == 4)
+			rtpcs_838x_sds_patch_4_fiber_6275b(ctrl);
+		else if (sds == 5)
+			rtpcs_838x_sds_patch_5_fiber_6275b(ctrl);
+
+		break;
+	case PHY_INTERFACE_MODE_QSGMII:
+		if (sds == 0 || sds == 1)
+			rtpcs_838x_sds_patch_01_qsgmii_6275b(ctrl);
+		else if (sds == 2 || sds == 3)
+			rtpcs_838x_sds_patch_23_qsgmii_6275b(ctrl);
+		else if (sds == 4)
+			rtpcs_838x_sds_patch_4_qsgmii_6275b(ctrl);
+
+		break;
+	default:
+		break;
+	}
+	
+	return 0;
+}
+
+static int rtpcs_838x_init_serdes_common(struct rtpcs_ctrl *ctrl)
+{
+	u32 val;
+
+	dev_dbg(ctrl->dev, "Init RTL838X SerDes common\n");
+
+	/* enable R/W of some protected registers */
+	regmap_write(ctrl->map, RTPCS_838X_INT_RW_CTRL, 0x3);
+
+	regmap_read(ctrl->map, RTPCS_838X_PLL_CML_CTRL, &val);
+	dev_dbg(ctrl->dev, "PLL control register: %x\n", val);
+	regmap_write_bits(ctrl->map, RTPCS_838X_PLL_CML_CTRL, 0xfffffff0,
+			  0xaaaaaaaf & 0xf);
+
+	/* power off and reset all SerDes */
+	regmap_write(ctrl->map, RTPCS_838X_SDS_CFG_REG, 0x3f);
+	regmap_write(ctrl->map, RTPCS_838X_RST_GLB_CTRL_0, 0x10); /* SW_SERDES_RST */
+	return 0;
+}
+
+static int rtpcs_838x_setup_serdes(struct rtpcs_ctrl *ctrl, int sds,
+				   phy_interface_t mode)
+{
+	int ret;
+
+	if (sds > 5)
+		return -EINVAL;
+	if (!rtpcs_838x_sds_is_mode_supported(sds, mode))
+		return -EINVAL;
+
+	rtpcs_838x_sds_power(ctrl, sds, false);
+
+	/* take reset */
+	rtpcs_sds_write(ctrl, sds, 0x0, 0x0, 0xc00);
+	rtpcs_sds_write(ctrl, sds, 0x0, 0x3, 0x7146);
+
+	ret = rtpcs_838x_sds_set_mode(ctrl, sds, mode);
+	if (ret)
+		return ret;
+
+	rtpcs_838x_sds_patch(ctrl, sds, mode);
+	rtpcs_838x_sds_reset(ctrl, sds);
+	
+	/* release reset */
+	rtpcs_sds_write(ctrl, sds, 0, 3, 0x7106);
+
+	rtpcs_838x_sds_power(ctrl, sds, true);
+	return 0;
+}
+
 /* RTL930X */
 
 /* The access registers for SDS_MODE_SEL and the LSB for each SDS within */
@@ -2769,6 +3059,12 @@ static int rtpcs_probe(struct platform_device *pdev)
 		ctrl->tx_pol_inv[sds] = of_property_read_bool(child, "realtek,pnswap-tx");
 	}
 
+	if (ctrl->cfg->init_serdes_common) {
+		ret = ctrl->cfg->init_serdes_common(ctrl);
+		if (ret)
+			return ret;
+	}
+
 	/*
 	 * rtpcs_create() relies on that fact that data is attached to the platform device to
 	 * determine if the driver is ready. Do this after everything is initialized properly.
@@ -2803,6 +3099,8 @@ static const struct rtpcs_config rtpcs_838x_cfg = {
 	.mac_rx_pause_sts	= RTPCS_838X_MAC_RX_PAUSE_STS,
 	.mac_tx_pause_sts	= RTPCS_838X_MAC_TX_PAUSE_STS,
 	.pcs_ops		= &rtpcs_838x_pcs_ops,
+	.init_serdes_common	= rtpcs_838x_init_serdes_common,
+	.setup_serdes		= rtpcs_838x_setup_serdes,
 };
 
 static const struct phylink_pcs_ops rtpcs_839x_pcs_ops = {

target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c

@@ -143,23 +143,6 @@ static void rtl8380_phy_reset(struct phy_device *phydev)
 	phy_modify(phydev, 0, BMCR_RESET, BMCR_RESET);
 }
 
-/* Read the link and speed status of the 2 internal SGMII/1000Base-X
- * ports of the RTL838x SoCs
- */
-static int rtl8380_read_status(struct phy_device *phydev)
-{
-	int err;
-
-	err = genphy_read_status(phydev);
-
-	if (phydev->link) {
-		phydev->speed = SPEED_1000;
-		phydev->duplex = DUPLEX_FULL;
-	}
-
-	return err;
-}
-
 /* Read the link and speed status of the 2 internal SGMII/1000Base-X
  * ports of the RTL8393 SoC
  */
@@ -807,127 +790,6 @@ static int rtl8380_configure_rtl8214fc(struct phy_device *phydev)
 	return 0;
 }
 
-static int rtl8380_configure_serdes(struct phy_device *phydev)
-{
-	u32 v;
-	u32 sds_conf_value;
-	int i;
-	struct fw_header *h;
-	u32 *rtl8380_sds_take_reset;
-	u32 *rtl8380_sds_common;
-	u32 *rtl8380_sds01_qsgmii_6275b;
-	u32 *rtl8380_sds23_qsgmii_6275b;
-	u32 *rtl8380_sds4_fiber_6275b;
-	u32 *rtl8380_sds5_fiber_6275b;
-	u32 *rtl8380_sds_reset;
-	u32 *rtl8380_sds_release_reset;
-
-	phydev_info(phydev, "Detected internal RTL8380 SERDES\n");
-
-	h = rtl838x_request_fw(phydev, &rtl838x_8218b_fw, FIRMWARE_838X_8380_1);
-	if (!h)
-		return -1;
-
-	if (h->magic != 0x83808380) {
-		phydev_err(phydev, "Wrong firmware file: magic number mismatch.\n");
-		return -1;
-	}
-
-	rtl8380_sds_take_reset = (void *)h + sizeof(struct fw_header) + h->parts[0].start;
-
-	rtl8380_sds_common = (void *)h + sizeof(struct fw_header) + h->parts[1].start;
-
-	rtl8380_sds01_qsgmii_6275b = (void *)h + sizeof(struct fw_header) + h->parts[2].start;
-
-	rtl8380_sds23_qsgmii_6275b = (void *)h + sizeof(struct fw_header) + h->parts[3].start;
-
-	rtl8380_sds4_fiber_6275b = (void *)h + sizeof(struct fw_header) + h->parts[4].start;
-
-	rtl8380_sds5_fiber_6275b = (void *)h + sizeof(struct fw_header) + h->parts[5].start;
-
-	rtl8380_sds_reset = (void *)h + sizeof(struct fw_header) + h->parts[6].start;
-
-	rtl8380_sds_release_reset = (void *)h + sizeof(struct fw_header) + h->parts[7].start;
-
-	/* Back up serdes power off value */
-	sds_conf_value = sw_r32(RTL838X_SDS_CFG_REG);
-	pr_info("SDS power down value: %x\n", sds_conf_value);
-
-	/* take serdes into reset */
-	i = 0;
-	while (rtl8380_sds_take_reset[2 * i]) {
-		sw_w32(rtl8380_sds_take_reset[2 * i + 1], rtl8380_sds_take_reset[2 * i]);
-		i++;
-		udelay(1000);
-	}
-
-	/* apply common serdes patch */
-	i = 0;
-	while (rtl8380_sds_common[2 * i]) {
-		sw_w32(rtl8380_sds_common[2 * i + 1], rtl8380_sds_common[2 * i]);
-		i++;
-		udelay(1000);
-	}
-
-	/* internal R/W enable */
-	sw_w32(3, RTL838X_INT_RW_CTRL);
-
-	/* SerDes ports 4 and 5 are FIBRE ports */
-	sw_w32_mask(0x7 | 0x38, 1 | (1 << 3), RTL838X_INT_MODE_CTRL);
-
-	/* SerDes module settings, SerDes 0-3 are QSGMII */
-	v = 0x6 << 25 | 0x6 << 20 | 0x6 << 15 | 0x6 << 10;
-	/* SerDes 4 and 5 are 1000BX FIBRE */
-	v |= 0x4 << 5 | 0x4;
-	sw_w32(v, RTL838X_SDS_MODE_SEL);
-
-	pr_info("PLL control register: %x\n", sw_r32(RTL838X_PLL_CML_CTRL));
-	sw_w32_mask(0xfffffff0, 0xaaaaaaaf & 0xf, RTL838X_PLL_CML_CTRL);
-	i = 0;
-	while (rtl8380_sds01_qsgmii_6275b[2 * i]) {
-		sw_w32(rtl8380_sds01_qsgmii_6275b[2 * i + 1],
-		       rtl8380_sds01_qsgmii_6275b[2 * i]);
-		i++;
-	}
-
-	i = 0;
-	while (rtl8380_sds23_qsgmii_6275b[2 * i]) {
-		sw_w32(rtl8380_sds23_qsgmii_6275b[2 * i + 1], rtl8380_sds23_qsgmii_6275b[2 * i]);
-		i++;
-	}
-
-	i = 0;
-	while (rtl8380_sds4_fiber_6275b[2 * i]) {
-		sw_w32(rtl8380_sds4_fiber_6275b[2 * i + 1], rtl8380_sds4_fiber_6275b[2 * i]);
-		i++;
-	}
-
-	i = 0;
-	while (rtl8380_sds5_fiber_6275b[2 * i]) {
-		sw_w32(rtl8380_sds5_fiber_6275b[2 * i + 1], rtl8380_sds5_fiber_6275b[2 * i]);
-		i++;
-	}
-
-	i = 0;
-	while (rtl8380_sds_reset[2 * i]) {
-		sw_w32(rtl8380_sds_reset[2 * i + 1], rtl8380_sds_reset[2 * i]);
-		i++;
-	}
-
-	i = 0;
-	while (rtl8380_sds_release_reset[2 * i]) {
-		sw_w32(rtl8380_sds_release_reset[2 * i + 1], rtl8380_sds_release_reset[2 * i]);
-		i++;
-	}
-
-	pr_info("SDS power down value now: %x\n", sw_r32(RTL838X_SDS_CFG_REG));
-	sw_w32(sds_conf_value, RTL838X_SDS_CFG_REG);
-
-	pr_info("Configuration of SERDES done\n");
-
-	return 0;
-}
-
 static int rtl8390_configure_serdes(struct phy_device *phydev)
 {
 	phydev_info(phydev, "Detected internal RTL8390 SERDES\n");
@@ -1098,25 +960,6 @@ static int rtl8218b_config_init(struct phy_device *phydev)
 	return 0;
 }
 
-static int rtl838x_serdes_probe(struct phy_device *phydev)
-{
-	int addr = phydev->mdio.addr;
-
-	if (soc_info.family != RTL8380_FAMILY_ID)
-		return -ENODEV;
-	if (addr < 24)
-		return -ENODEV;
-
-	/* On the RTL8380M, PHYs 24-27 connect to the internal SerDes */
-	if (soc_info.id == 0x8380) {
-		if (addr == 24)
-			return rtl8380_configure_serdes(phydev);
-		return 0;
-	}
-
-	return -ENODEV;
-}
-
 static int rtl8393_serdes_probe(struct phy_device *phydev)
 {
 	int addr = phydev->mdio.addr;
@@ -1224,17 +1067,6 @@ static struct phy_driver rtl83xx_phy_driver[] = {
 		.write_mmd	= rtl821x_write_mmd,
 		.write_page	= rtl821x_write_page,
 	},
-	{
-		PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
-		.name		= "Realtek RTL8380 SERDES",
-		.features	= PHY_GBIT_FIBRE_FEATURES,
-		.probe		= rtl838x_serdes_probe,
-		.read_page	= rtl821x_read_page,
-		.write_page	= rtl821x_write_page,
-		.suspend	= genphy_suspend,
-		.resume		= genphy_resume,
-		.read_status	= rtl8380_read_status,
-	},
 	{
 		PHY_ID_MATCH_MODEL(PHY_ID_RTL8393_I),
 		.name		= "Realtek RTL8393 SERDES",

target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.h

@@ -35,19 +35,6 @@ struct __packed fw_header {
 #define PHY_IS_RTL8214FB			2
 #define PHY_IS_RTL8218B_E			3
 
-/* Registers of the internal Serdes of the 8380 */
-#define RTL838X_SDS_MODE_SEL			(0x0028)
-#define RTL838X_SDS_CFG_REG			(0x0034)
-#define RTL838X_INT_MODE_CTRL			(0x005c)
-#define RTL838X_DMY_REG31			(0x3b28)
-
-#define RTL8380_SDS4_FIB_REG0			(0xF800)
-#define RTL838X_SDS4_REG28			(0xef80)
-#define RTL838X_SDS4_DUMMY0			(0xef8c)
-#define RTL838X_SDS5_EXT_REG6			(0xf18c)
-#define RTL838X_SDS4_FIB_REG0			(RTL838X_SDS4_REG28 + 0x880)
-#define RTL838X_SDS5_FIB_REG0			(RTL838X_SDS4_REG28 + 0x980)
-
 /* Registers of the internal SerDes of the RTL8390 */
 #define RTL839X_SDS12_13_XSG0			(0xB800)