These formally pending patches were merged into upstream Linux some time
ago. Move them to the backports folder and add the kernel version they
were added to the file name.
Link: https://github.com/openwrt/openwrt/pull/21366
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace pending patches which are already integrated in upstream Linux
with their upstream versions.
These patches were exported with:
git format-patch -1 -k
Link: https://github.com/openwrt/openwrt/pull/21366
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix the unit-address of the scuclk node.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20985
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No functional changes intended.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20985
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that the PCS driver keeps track of how many links are registered per
SerDes, we can also decide which real hardware mode to use when USXGMII
is set. While there is still no proper setup for 10G-QXGMII or XSGMII,
the existing USXGMII 10G-SXGMII setup seems to work properly.
Soften the condition when to exit early so that single 10G port USXGMII
can be setup properly.
Fixes: c18476d0c5 ("realtek: RTL931x: disable USXGMII SerDes setup")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21365
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Because the PCS driver keeps track of the number of registered links for
each SerDes now, we now know when there is no link on a SerDes. In this
case, determine to turn off the SerDes in the mode mapper.
Though the phylink subsystem shouldn't attempt to config something
different when no link/port references a Serdes, be on the safe side.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21365
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
A SerDes may supply multiple ports and depending on that number,
different hardware modes need to be used. While there are corresponding
modes in the kernel in some cases (e.g. USXGMII with 4 2.5G ports aka
10G-QXGMII), this doesn't always map to Realtek hardware modes. Use the
previously added link number accounting for that.
An obvious example of this is the SerDes on XGS12xx-12 switches which
is connected to an octa-PHY. This runs Realtek proprietary XSGMII mode
(10G-pumped SGMII interface) for which there is no corresponding mode
in the kernel.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21365
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a field to the rtpcs_serdes structure to keep track of how many
links (aka ports) are used on a single SerDes. This is needed to be
known to map kernel interface modes to SerDes hardware modes properly
(e.g. USXGMII --> USXGMII/10G-QXGMII/XSGMII).
While working in rtpcs_create, optimize referencing the SerDes instance
for cleaner code.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21365
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
100Base-X mode was missing before in the enum rtpcs_sds_mode. So add it
to be able to support this mode too. Handle this mode in the
_determine_hw_mode mapper.
10G_QXGMII mode was missing in the mode mapper. Add it and map it to
USXGMII_10GQXGMII mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21365
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is adding SUN6I-CSI and OV5640 driver for AllWinner platform for NanoPi
Signed-off-by: Michel Promonet <michel.promonet@free.fr>
Link: https://github.com/openwrt/openwrt/pull/20085
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
- adopted MTD partition size increase from 64M to 128M
-> this allows boot to complete
- moved MAC addressing stuff out of partition definitions
- all MAC addressing stuff is in .dtsi
Specifications:
SoC: MediaTek MT7981B
RAM: 256MiB
Flash: Winbond SPI-NAND 128 MiB
Switch: 1 WAN, 3 LAN (Gigabit) MediaTek MT7531
Buttons: Reset, Mesh
Power: DC 12V 1A
WiFi: MT7981B 2.4Ghz & 5.8Ghz
Led Layout from bottom to top:
Power
Mesh (RGB Led, user controllable, default set to OpenWrt Status)
WLAN 2 GHz (user controllable)
WAN (user controllable)
LAN3
LAN2
LAN1
WLAN 5 GHz (Not on front panel but blinks through enclosure,
user controllable)
Buttons:
Reset
Mesh (user controllable, no default function)
Installation:
A. Through U-Boot menu:
- Prepare your connecting computer to use a static IP in
network 192.168.1.0/24
- Power down the router and hold in the Reset button.
- While holding in the button power up the router again.
- Hold the button in for 10 seconds and then release.
- Use your browser to go to 192.168.1.1
- If you see a GUI allowing for flashing firmware then
you got the right model.
- Upload the sysupgrade file.
Note: Recovery GUI can be used to recover from an incorrect
firmware flash.
B. Through OpenWrt Dashboard:
If your router comes with OpenWrt preinstalled
(modified by the seller), you can easily upgrade
by going to the dashboard (192.168.1.1) and then
navigate to System -> Backup/Flash firmware,
then flash the firmware
MAC Addresses were found in Factory partition:
offset 0x4 F8:5E:3C:xx:xx:aa --> Router Label -2
offset 0xa F8:5E:3C:xx:xx:bb --> Router Label -1
offset 0x24 F8:5E:3C:xx:xx:cc --> Router Label +1
offset 0x2a F8:5E:3C:xx:xx:yy --> printed on Router Label
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/19823
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
- Use .dtsi for old z8103ax featuring a 64M Nand
- Prepare .dtsi for model C of z8103ax featuring a 128M Nand
This .dtsi is supposed to match boards labeled as hardware
revision Z8103AX_V01. Model variant D of zbt-z8103ax appears
to use very same board.
DTS include does also
- set wifi mac addresses in &wifi section
- set eth mac addresses in ð section
- set LAN switch mac addresses in &switch section
All of the above allows to get rid of 11_fix_wifi_mac script
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/19823
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace patches with version accepted upstream.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/21333
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for the Cudy AP3000 Wall v1.
SoC: MediaTek MT7981b
RAM: 256MiB
Flash: spi-nand spi0.0: 128 MiB
Wifi: MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
LEDs: 1 LED in two colors (red & white)
Buttons: 1 reset, 1 led on/off
Ethernet: 5x 1GbE
Power: PoE powered (standalone)
The stock firmware is a customized variant of OpenWrt, which implements
a signature check that only allows flashing official firmware. Cudy offers
intermediate OpenWrt firmware images on their website [1][2] which do not
implement the signature check. After flashing the intermediate image the
upstream official OpenWrt image can be installed.
The stock firmware can be recovered via TFTP using the U-Boot based boot
loader[3]. Set up a TFTP server on your computer with IP 192.168.1.88/24
serving the stock firmware from Cudy's website renamed to "recovery.bin".
Press and hold the reset button while powering on the device, wait for the
TFTP server to send the recovery.bin file, then release the reset button.
The router will take a couple of minutes to reboot and set up the stock
firmware.
[1] https://www.cudy.com/blogs/faq/openwrt-software-download
[2] https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
[3] https://www.cudy.com/en-us/blogs/faq/how-to-recovery-the-cudy-router-from-openwrt-firmware-to-cudy-official-firmware
Signed-off-by: Derek Denk <derek.denk@live.com>
Link: https://github.com/openwrt/openwrt/pull/21266
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The MAC can get PHY abilities, link status, etc. via different ways. In
RTL931x, the corresponding register needs to be setup properly. By
default, all ports use out-of-band MDIO polling to retrieve that
information. Thus, PHY-backed ports usually work with the default
setting.
For SFP ports, there is no MDIO polling available. Instead, the SerDes
ability bus needs to be used to retrieve the link information.
So far, the bootloader (e.g. U-boot) had to properly initialize that
setting. Instead of relying on that, do that properly during MAC setup.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21351
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The GS110TUP's lan9 port is connected via a QSGMII PHY to SERDES 2, and
therefore should use the SWITCH_PORT_SDS macro instead of SWITCH_PORT. This
was missed in e956adfe because the GS110TUP is not particularly well
documented and the old code was confusing.
lan10 is an SFP and doesn't have an onboard PHY, so also remove its
associated PHY references and update it to match other devices' SFP ports.
Fixes: https://github.com/openwrt/openwrt/issues/21324
Signed-off-by: Jacob Potter <jacob@j4cbo.com>
Link: https://github.com/openwrt/openwrt/pull/21346
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.
find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now rt-loader expects a piggy-backed lzma compressed data
stream. Be more flexible and allow a piggy-backed uimage as well.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21332
Signed-off-by: Robert Marko <robimarko@gmail.com>
The loading function searches the image on flash (or its memory
copy). Rename it to make clearer what the function does. Adapt
comments accordingly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21332
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now search_image() is used for searching a uImage on
flash (or the memory mapped equivalent). In a future commit
this will be reused to search for a piggy-backed uimage.
Make this function generic by
- replacing "flash" with "image" in variables
- Search bytewise and do not rely on 4 byte alignment
- remove 2 obsolete variables
- move console output to caller
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21332
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now is_uimage() is only a crc check and the caller
still needs to check other bits of the uimage header. Make
this function what it is meant to be.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21332
Signed-off-by: Robert Marko <robimarko@gmail.com>
A lot of soc_info usage has been reorganized. Nevertheless there
are some consumers left. A very critical one is the dsa/qos coding.
It makes use of the cpu_port in this shared structure. This is
totally broken as that info is never properly initialized. Fill
the cpu_port according to the identified hardware.
Remark: Looking at the prom.c history soc_info.cpu_port was never
setup since the beginning of time. So no "fixes" tag here.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21327
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For some reason the highmem configuration of RTL930x
devices was totally missed until now. Take over the
setup from the SDK. This will avoid boot stalls on
switches with more than 256 MB RAM when switching
over to kernel 6.18.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21327
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For proper highmem initialization on RTL930x the size of the
installed memory is needed during early bootup. Enhance the
soc_info structure and fill the data from the registers.
While we are here remove the obsolete compatible variable from
the soc_info structure.
Adapt boot message to show the memory size.
old: SoC Type: Realtek RTL9301 rev B (6487)
new: Realtek RTL9301 rev B (6487) SoC with 512 MB
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21327
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is mix of variable naming in prom.c. Use a fixed
prefix of "rtl_" for all static variables. Additionally
remove the prefix from rtl83xx_set_system_type as it is
a generic function for all SoC types.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21327
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Set SND_SOC_NAU8325 to no
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/21329
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SUPPORTED_DEVICES sets for both Maxlinear (v1) and Airoha (v2)
devices were identical, so sysupgrade was unable to detect when an
incorrect image was being installed. This caused "soft bricking" of
devices when a v1 image was installed on a v2 device, and vice versa.
Fix this by making the supported_devices distinct for each device
version, by renaming the devices with a version-specific name.
This is reflected in the file name and the image metadata.
Fixes: https://github.com/openwrt/openwrt/issues/20566
Fixes: https://github.com/openwrt/asu/issues/1525
Signed-off-by: Eric Fahlgren <ericfahlgren@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20632
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This allows us to use the full size of nand,
which extends ubi size from 64Mb to 122.25Mb.
If you are at factory firmware, please refer
to [PR](https://github.com/openwrt/openwrt/pull/21141)
to boot into OpenWrt first.
1. Log in to the device and backup all the partitions,
especially unique `Factory` and `bdata` partitions
from System -> Backup / Flash Firmware -> Save mtdblock contents.
2. Install kmod-mtd-rw to unlock mtd partitions for writing:
```bash
apk update && apk add kmod-mtd-rw && insmod mtd-rw i_want_a_brick=1
```
3. Write new OpenWrt (U-Boot Layout) `BL2` and `FIP`:
```bash
mtd write openwrt-mediatek-filogic-cudy_wbr3000uax-v1-ubootmod-preloader.bin BL2
mtd write openwrt-mediatek-filogic-cudy_wbr3000uax-v1-ubootmod-bl31-uboot.fip FIP
```
4. Set static IP on your PC: `192.168.1.254`, gateway `192.168.1.1`
5. Serve openwrt-mediatek-filogic-cudy_wbr3000uax-v1-ubootmod-initramfs-recovery.itb
using TFTP server.
6. Connect Router LAN with PC LAN.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt initramfs recovery has booted,
clean `/dev/mtd5` ubi partition to utilize maximum of free space & create ubootenvs:
```bash
ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
```
4. Perform sysupgrade.
Tested-by: 4pda users
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21225
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Another OEM variation of a Cudy WR3000 series device made for Russian market.
Hardware:
- SoC: MediaTek MT7981B
- CPU: 2x 1.3 GHz Cortex-A53
- Flash: 128 MiB GigaDevice SPI NAND. Flash Model: F50L1G41LB, ID: C801
- RAM: DDR3, 512 MiB
- WLAN: 2.4 GHz, 5 GHz (MediaTek MT7976CN, 802.11ax)
- 1x WAN MT7531 (JXD 2531Z) 10/100/1000 Mbps
- 4x LAN 2x MT7530 (JXD 2529S) 10/100/1000 Mbps
- USB 3.0 port
- Buttons: Reset, WPS
- 8x LEDs: 2x Red, 6x Blue
- Serial console: no need to solder, just open the case and unskrew the radiator, TX-RX, RX-TX, GND-GND, VCC do not connect, 115200 8n1
- Power: 12 VDC, 1.5 A
+---------+-------------------+-----------+
| | MAC | Algorithm |
+---------+-------------------+-----------+
| WAN | 80:AF:CA:xx:xx:x1 | label+1 |
| LAN | 80:AF:CA:xx:xx:x0 | label |
| WLAN 2g | 80:AF:CA:xx:xx:x0 | label |
| WLAN 5g | 82:AF:CA:xx:xx:x1 | label+1 |
+---------+-------------------+-----------+
Based on a factory layout with only 64mb partition for easier transition from factory to OpenWrt for users if the "intermediate" RSA signed firmware will be provided by Cudy.
**Installation**
The installation must be done via UART & TFTP by disassembling the router. On other occasions Cudy has distributed intermediate firmware and dts to make installation easier, but since this router is OEM special WB order for local RU market there is a possibility they will not provide it.
**Install using UART & TFTP**
1. Connect to UART.
2. Since the factory BL is locked and the boot process can not be stopped, you have to use mtkuartboot, hold reset, engage the power, boot into your payloaded bl2 & fip.
3. Connect to LAN and set your IP to 192.168.1.254.
4. Configure a TFTP server to serve openwrt-mediatek-filogic-cudy_wbr3000uax-v1-initramfs-kernel.bin file.
5. Run these steps in u-boot using the name of your file:
```
setenv bootfile openwrt-mediatek-filogic-cudy_wbr3000uax-v1-initramfs-kernel.bin
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.254
tftpboot
bootm
```
6. Router will boot into OpenWrt initramfs recovery, just open your browser `192.168.1.1` and sysupgrade with the `Keep settings` option turned off.
Tested-by: many 4pda users
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21225
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since there are many similar devices from Cudy (TR3000 / WR3000E / WR3000P / WR3000S / WBR3000UAX) this will allow to create OpenWrt U-Boot layout for all of them using same DDR3 target.
Tested-by: 4pda users
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21225
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for the Cisco Meraki MR20/Go GR10.
The Meraki MR20 is a Cisco 802.11ac/WiFi 5 AP with 1 Ethernet port.
It can be powered by a 12V DC barrel jack (5.5x2.5mm, center positive)
or via 802.3af POE.
The Meraki Go GR10 (codename: Maggot) is identical to the MR20
(codename: Grub), so this document will refer to both devices as the MR20.
MR20 hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 256MB DDR3
* Storage: 128 MB (MX30LF1G18AC)
* Networking: 1 Gigabit Ethernet
* WiFi: QCA4019 802.11b/g/n/ac
* Serial: Internal header (J10, 2.54mm, unpopulated)
This device ships with secure boot, and cannot be flashed without
external programmers (TSOP48 NAND and I2C EEEPROM)!
Disassembly:
Remove the four rubber feet on the rear of the AP and the four
Torx T8 screws under the feet.
Using a guitar pick or similar plastic tool, insert it on the side
along the seam around the edge. Push in gently while gently lifting
the front of the housing to release the plastic retention clips.
There are 15 clips in total.
Once you have removed the plastic front (shown above already removed
so you know where the clips are), remove the 4 Philips screws holding
down the two metal WiFi antennas.
Lift the PCB gently while pushing the Ethernet port into the housing
to release it. The PCB should come free from the metal heat spreader.
The TSOP48 NAND flash (U9, Macronix/MXIC MX30LF1G18AC) is located on
the opposite side of the PCB.
To flash, you need to desolder the TSOP48 or use a 360 clip.
You also need to reprogram the I2C EEPROM (U20, Atmel 24c64).
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/mr20_gr10
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Decompress `ubi.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `ubi` portion of NAND from
`0xc60000`-`0x8400000` (length `0x77a0000`). Offsets here include OOB data.
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2c` or `0x25`). Remember to re-write the EEPROM with the
modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug in an
Ethernet cable and power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_mr20-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_mr20-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_mr20-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20646
Signed-off-by: Robert Marko <robimarko@gmail.com>
qcom-ipq4029-insect-common.dtsi was common to the MR33 and MR74, but was no
longer common with the other supported Meraki devices. I have refactored
insect-common and wired-qca-common into qcom-ipq4029-meraki-common.dtsi
which contains the actual common components (e.g. NAND partitions, ART nvmem).
Individual devices reference qcom-ipq4029-meraki-insect.dtsi
plus their own individual configuration.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20646
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SerDes mode setting at the end of rtpcs_931x_setup_serdes is
currently broken although it is mostly similar to what the SDK does [1].
It prevents several modes from being set, especially fiber modes. This
seems to be one (if not the only) issue for currently missing SFP
support.
Add a small helper function which takes cares of setting the mode, to
keep the still valid different procedure when using XSGMII mode. Only
this helper is called in rtpcs_931x_setup_serdes to keep it clean there.
As a functional change, call mode application in every case, not just
for SGMII, QSGMII and USXGMII. We can assume the SDK is misleading in
this case, either accidentially or on purpose. This makes SFP modules
work in theory. In practice, there still seem to be device-specific
issues which need to be fixed later. These issues may include no link
detection or link flapping.
[1] f7f85ffc14/sources/rtk-dms1250/src/dal/mango/dal_mango_construct.c (L2266)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SDK and our code for finally applying the hardware mode are quite
confusing. There are two different "places" where a mode can be set,
in a SerDes register and in a global SerDes mode register. Neither the
SDK nor any of the datasheet/documentation serve any explanation for
that. The functions are just named "fiber_mode_set" and "mii_mode_set"
which is basically as useless as it can be to understand it.
Try to get rid off this confusion by naming the functions
'sds_set_mac_mode' and 'sds_set_ip_mode' to make clear where the mode
is set. While at it, also clarify the naming of 'config_mode' by
renaming it to 'config_hw_mode'.
The naming is based on the following assumption:
> Realtek uses an SerDes IP core design (probably from another vendor)
> in their switch. This supports a variety of modes and must be
> configured properly for each mode. Usually, changing the mode in the
> MAC's registers triggers a proper configuration of the SerDes IP block
> in the background.
> However, for some modes this seems to be incomplete, at least missing
> important parts so it doesn't work on its own in the end. In this
> case, the SerDes IP block needs to be configured manually with the
> missing bits to make it work.
There are several places in the SDK that support this assumption, both
for RTL931X and RTL930X (as they are somewhat similar), e.g. [1].
[1] f7f85ffc14/sources/rtk-dms1250/src/dal/longan/dal_longan_sds.c (L1746)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Improve the current mode setting functions to address a few issues:
- add missing mode from SDK reference (instead of using the
corresponding value as a default value)
- use and return error values
- give internal variable a more meaningful name
- consistently use lowercase letters in hex values
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Merge the unused helper 'rtpcs_931x_sds_fiber_disable' into Fiber mode
setting, and drop the helper itself. As with the MII helper in a
previous commit, functionality is basically the same just with a value
for OFF mode. If functionality is required later, Fiber mode setting can
be used with the OFF mode instead of carrying the unused helper until
it's used.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use the hardware mode instead of PHY_INTERFACE_MODE_* mode for mode
setting. Adjust all affected functions and switch cases accordingly.
In MII mode setting, drop the case for 2500Base-X as this is a mistake.
In the SDK reference code, this doesn't exist [1].
[1] 69d2890a2e/sources/rtk-dms1250/src/hal/phy/phy_rtl9310.c (L817)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Merge the 'rtpcs_931x_sds_disable' helper into the MII mode setting and
use that instead. The helper was essentially doing same just with a
value for OFF state.
Moreover, the name of the helper was confusing. It implied it disables
the whole SerDes. However, this is used in Fiber mode setting and thus,
cannot completely disable the SerDes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
The function 'rtpcs_931x_sds_mii_mode_set' does not correctly write the
register. It just write a plain value at the determined register
address. While this works for SerDes with (id mod 4 == 0), it doesn't
for the other SerDes.
Fix that by using a corresponding shift and writing only some bits
instead of the whole register.
While at it, drop an unneeded blank line, add comment to explain a bit
that is set and use the BIT(..) helper for that instead of manual shift.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Bring the RTL931X functions into a proper order for two purposes:
- be able to reuse code
- have blocks of logically connected functions
This just moves code, no functional changes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the implementation to clear symbol errors. Up to now, it was barely
functional because important modes weren't handled. Add another function
(which is needed in the future anyway) and pick to missing bits from
that function into the symbol clearing function to handle the modes
1000Base-X and 10GBaseR too. All that is based on [1].
While at it, rename the function to adhere to a common naming scheme and
fix some minor style issues.
[1] 69d2890a2e/sources/rtk-dms1250/src/hal/phy/phy_rtl9310.c (L703)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that the bus is completely configured by the dts
compatible, drop the hard coded family detection.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21274
Signed-off-by: Robert Marko <robimarko@gmail.com>
Place the reset function into the config structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21274
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is no need to give the mdio bus a family dependent name.
Name the bus similar to the SerDes mdio bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21274
Signed-off-by: Robert Marko <robimarko@gmail.com>
Move the read/write functions to where they belong.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21274
Signed-off-by: Robert Marko <robimarko@gmail.com>
