This device is very similar to the already supported XGS1210-12 A1. For
now, only revision A1 is supported (not marked on the label).
Hardware:
- RTL9302B SoC
- 16 MiB NOR flash
- 128 MiB DDR3 SDRAM
- 8x 1G RJ45 (RTL8218D)
- 2x 2.5G RJ45 (2x RTL8226)
- 2x SFP+ (supporting 1G/2.5G/10G)
- 3.3V UART serial (115200 baud 8N1) on the right side of the case
(from bottom to top: GND, RX, TX, VCC)
It is originally an unmanaged switch, so there are a few differences:
- No reset button
- Different partition layout: There is some reserved space in the middle
of the flash which might be used by the bootloader for flash testing.
The remaining space in between is used for OpenWrt using mtd-concat.
The largest contiguous area is at the beginning, allowing a maximum
kernel size of 7 MiB.
- No individual MAC address: This device ships with an empty U-Boot
environment. When an OpenWrt squashfs image is booted for the first
time, a random MAC address will be written to the environment (but
only if the environment has been initialized from the bootloader
before and contains the default MAC address).
Steps to boot initramfs image via network:
- Configure a TFTP server to provide the OpenWrt initramfs image
- Connect to device using serial (see hardware information above)
- Power on the device and enter U-Boot using Esc when prompted
- Run the following commands (adjust as necessary):
# rtk network on
# tftpboot 0x84f00000 192.168.1.100:openwrt-xgs1010-initramfs.bin
# bootm
Installation on flash:
- Boot initramfs image as described above
- Now is a good time to create a backup of all flash partitions! You'll
need this if you want to revert to the unmanaged factory firmware at
some point.
- Use sysupgrade to install OpenWrt
- After restart enter U-Boot again and set the boot command:
# setenv bootcmd 'rtk network on; bootm 0xb4900000'
# saveenv
# run bootcmd
Note: The command "rtk network on" is only needed because the drivers
currently rely on some setup by the bootloader (without this the RJ45
ports don't work). If the drivers improve in the future, it should be
removed (i.e. change the boot command to "bootm 0xb4900000").
Reverting to factory firmware:
- Write back your backup of the firmware partition (or write just the
fwconcat1 partition, and erase the other two fwconcat partitions)
- Change the boot command back to "boota" (or just erase the u-boot-env
partition so the default gets used)
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
L3 Offloading caused DHCP packets to be dropped at hardware level
And potentially buggy route implementation can cause a crash
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20208
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get support for the Realtek ECC engine with 6.18.
To make use of this in Openwrt
- backport upstream patches
- change config so that ECC will be built for nand subtargets
- define ECC engine in RTL93xx DTS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19746
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
for_each_available_child_of_node(ports, port) {
pcs_node = of_parse_phandle(port, "pcs-handle", 0);
of_property_read_u32(port, "reg", &port_nr)) {
priv->pcs[port_nr] = rtpcs_create(dev, pcs_node, port_nr);
}
...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the SerDes access is realized with some helper functions
in the mdio bus. These were moved around a lot and had no real home.
End that temporary solution to move them where they belong.
The target design for the different Realtek drivers is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (to be developed)
- mdio driver manages SerDes on low level (this commit)
This driver adds the low level SerDes access via mdio. For debugging
purposes the user can interact with the SerDes in different ways.
First, there is a debug interface in
/sys/kernel/debug/realtek_otto_serdes/serdes.X/registers.
With that a dump of all registers can be shown.
> cat /sys/kernel/debug/realtek_otto_serdes/serdes.4/registers
Back SDS 4: 00 01 02 03 04 05 06 07 08
SDS : 0C03 0F00 7060 7106 074D 0EBF 0F0F 0359 5248
SDS_EXT : 0000 0000 85FA 8C6D 5CCC 0000 20D8 0003 79AA
...
Second, one can read/write registers via the mmd functions of the
mdio command line tool. Important to know: The registers are accessed
on the vendor specific MDIO_MMD_VEND1 device address (=30). Additionally
the SerDes page and register are concatenated into the the mmd register.
Top 8 bits are SerDes page and bottom 8 bits are SerDEs register.
E.g.
- mmd 0x0206 : SerDes page 0x02, SerDes register 0x06
- mmd 0x041f : SerDes page 0x04, SerDes register 0x1f
Read register 0x02 on page 0x03 of SerDes 0
> mdio realtek-serdes-mdio mmd 0:30 raw 0x0302
Write register 0x12 on page 0x02 of SerDes 1
> mdio realtek-serdes-mdio mmd 1:30 raw 0x0212 0x2222
For now this driver is only defined in the devicetree and activated
in the kernel build. There is no current consumer but at least
the debugging interface is available. Cleanup of the currently used
SerDes functions will come later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20062
Signed-off-by: Robert Marko <robimarko@gmail.com>
So much code was distributed between phy/ethernet/dsa drivers. A lot
was already cleand up before. With this step the mdio bus gets its
own space and is no longer hidden inside the ethernet driver.
This commit is mostly a copy/paste that includes only minor changes.
- define prefixes are renamed to RTMDIO
- The driver is totally self contained (does not rely on SoC include)
- The DTS structure (mdio node below ethernet node) was kept
- The driver is added to the kernel config of all subtargets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19942
Signed-off-by: Robert Marko <robimarko@gmail.com>
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some known RTL93xx devices like the Linksys LGS328C or LGS352C are
NAND based. These require additional drivers and packages (e.g. UBI).
The current subtargets are already taylored down for devices with
only 16MB flash. Adding features that are not used will only make
the storage situation more complicated.
Add two new subtargets for RTL93xx that include the basic NAND, UBI
and MTD features. To achieve this do the following:
- Create new subtarget folders
- Copy the existing config and makefiles over
- Add the basic additional features
- Mark them as SOURCE-ONLY
- Add empty image makefiles
- Remove unneded NAND/MTD features from existing configs
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19700
Signed-off-by: Robert Marko <robimarko@gmail.com>
Like RTL839x the RTL930x SoCs have multithreading built in.
Activate it in the kernel configuration.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19624
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93xx devices have a NAND controller built in. Upstream already
has a driver in place. Include it downstream. Activate it in the
RTL93xx builds and disable it for the RTL83xx builds.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19583
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for Hasivo S1100W-8XGT-SE switch.
Device specification
--------------------
SoC Type: RTL9303
RAM: Samsung K4B461646E-BYKO (512MB)
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 8x 10G via 2x RTL8264 PHY
LEDs: 2 LEDs, 1 power green, 1 system green
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot - U-Boot 2011.12.(3.6.6.55087) (Nov 13 2022 - 14:37:31)
Fan: 2 fans controlled by STC8G1K08 TSOP-20 microcontroller
Note: The fan appears to operate the same irrespective of the running
firmware. The STC9G1K08 is likely operating independently.
To explore the stock vendor firmware, there are 2 avenues to gain root
access. This is not necessary to install OpenWrt, but is here for
reference.
Root access via serial
----------------------
1. ctrl+t
2. password: switchrtk
3. press 's' for shell
Root access via SSH
-------------------
1. ctrl+t
2. password: switchrtk
3. sys command sh
4. log in with your username+password
5. ctrl+t
6. password: switchrtk
7. press 's' for shell
Credit to https://forum.openwrt.org/t/hasivo-switches/151758/174 for rooting instructions.
Installing OpenWrt
------------------
1. Connect to UART. UART requires soldering an RJ45 connector to the
console footprint on the board. The header is on the top right of
this image: 4d2ab97fad.jpeg
2. Set computer IP to 192.168.0.111.
3. Enter bootloader by pressing esc key during boot.
4. Enter password 'Hs2021cfgmg'.
5. Type 'XXXX'.
6. setenv bootcmd 'rtk network on; bootm 0xb4300000'
7. saveenv
8. rtk network on
9. tftpboot 0x84f00000 <openwrt-initramfs>
10. bootm 0x84f00000
Now you can copy over the sysupgrade image and install.
Credit to
https://forum.openwrt.org/t/hasivo-switches/151758/22?u=andrewjlamarche
for u-boot console access instructions.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17137
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove all files etc. for 6.6 because 6.12 is default now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19139
Signed-off-by: Robert Marko <robimarko@gmail.com>
Run this script:
./scripts/kconfig-reorder.sh
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://github.com/openwrt/openwrt/pull/19200
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently only RTL83xx devices are known with shared SCL pins.
So activate the driver only for those targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18737
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit d7e82c78d7 added a generic kernel patch that exposes a new
symbol REALTEK_PHY_HWMON when REALTEK_PHY and HWMON are enabled. The new
symbol was added to kmod-phy-realtek, but the kmod is not used in the
realtek target.
Fixes: d7e82c78d7 ("generic: backport Realtek PHY patches from upstream")
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The CONFIG_NET_SWITCHDEV option is needed by CONFIG_DSA and some other
options. It is boolean, we have to compile it into the kernel it self.
Activate it for all targets in the generic configuration, it is already
activated for most of them. This allows to install DSA drivers as a
module.
On the ramips/mt7620 target the kernel would grown by 4.5kB.
For some small targets which do not support a DSA switch by default the
option is deactivated.
Link: https://github.com/openwrt/openwrt/pull/17668
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The old RTL8231 driver integrated the MDIO bus access with the GPIO
control ops, making this driver not very portable to newer platforms.
It depended on the SoC ID instead of the compatible to determine the
MDIO access register, further complicating portability.
A new MFD driver is now available, which offers proper pin config as
well as optional LED support, which can work on any (bitbanged) MDIO
bus. Now that all devices have been migrated, we can drop the old code.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Enable HIGHMEM option to use all ranges of memory on XikeStor SKS8300-8X
that has 512MiB RAM.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17593
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add pending patches to add RTL8231 support as a MDIO-bus attached
multi-functional device. This includes subdrivers for the pincontrol and
GPIO features, as well as the LED matrix support.
Leave the drivers disabled until required by a device.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add a driver that exposes the auxiliary busses, used for the RTL8231
expanders, as a proper MDIO controller. The device must be instantiated
under an MFD device, so the driver should also be compatible with SoC
managed by an external CPU via SPI.
Leave the driver disabled in builds until required.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Since the start of the Realtek target OpenWrt works with RTL83XX as the
target architecture. Upstream is using MACH_REALTEK_RTL instead. To
simplify further development align that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16963
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Drop config and files for Linux 5.15.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/16417
Signed-off-by: Robert Marko <robimarko@gmail.com>
Copy files and config from 5.15 kernel version. Because of the big version jump
leave out the patches for now so we can treat them individually later on.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
All targets are bumped to 5.15. Remove the old 5.10 patches, configs
and files using:
find target/linux -iname '*-5.10' -exec rm -r {} \;
Further, remove the 5.10 include.
Signed-off-by: Nick Hainke <vincent@systemli.org>
The legacy (BSD) PTY support could open security problems in a system,
We do not need them in OpenWrt, deactivate this option in all targets.
Debian also deactivates this option.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On the realtek target, the subtarget makefiles include a KERNEL_PATCHVER
setting, shadowing KERNEL_PATCHVER from target/linux/realtek/Makefile.
This makes the realtek target an exception in this regard, and makes
switching kernel version a bit bothersome. Remove the overrides so all
subtargets use the same kernel version.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Use the new timer driver for the RTL930x devices.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[remove old clock provider, select MIPS_EXTERNAL_TIMER and refresh
kernel config]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Our current Makefiles a little bit messy and can be improved somewhat,
both in whitespace and in style.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
The new timer is not yet ready for all targets. Avoid interactive
questions during build
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[rename symbol to CONFIG_REALTEK_OTTO_TIMER]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Since introduction of clock driver we have a new kernel config
setting. Provide an initial value for the 930x targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
All targets expect the malta target already activate the CONFIG_GPIOLIB
option. Move it to generic kernel configuration and also activate it for
malta.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is now built-in, enable so it won't propagate on target configs.
Link: https://lkml.org/lkml/2022/1/3/168
Fixes: 79e7a2552e ("kernel: bump 5.15 to 5.15.44")
Fixes: 0ca9367069 ("kernel: bump 5.10 to 5.10.119")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(Link to Kernel's commit taht made it built-in,
CRYPTO_LIB_BLAKE2S[_ARM|_X86] as it's selectable, 5.10 backport)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Remove redundant target-level entries, noting that these settings will be
configured from "Kernel build options" of Kconfig.
Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
[remove from new configs introduced after patch submission]
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
