realtek: DSA: Document meaning of lag priv variables

The names of the LAG variables in struct rtl838x_switch_priv are not self
explaining. They are even suggesting that they are dealing with information
which are actually stored in a different variable. As first step, document
their meaning.

Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Sven Eckelmann 2025-11-09 09:38:48 +01:00 committed by Hauke Mehrtens
parent 14095ab268
commit f82da653fd

View file

@ -1164,9 +1164,22 @@ struct rtl838x_switch_priv {
u32 fib_entries;
int l2_bucket_size;
struct dentry *dbgfs_dir;
/** @lags_port_members: Port (bit) is part of a specific LAG */
u64 lags_port_members[MAX_LAGS];
/** @lag_primary: port of a LAG is primary (repesenting) and is added to
* the port matrix
*/
u32 lag_primary[MAX_LAGS];
/**
* @is_lagmember: Port is part of any LAG but not the first/primary
* port which needs to be added in the port matrix
*/
u32 is_lagmember[57];
/** @lagmembers: Port (bit) is part of any LAG */
u64 lagmembers;
struct workqueue_struct *wq;
struct notifier_block ne_nb;