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realtek: DSA: Document meaning of lag priv variables
The names of the LAG variables in struct rtl838x_switch_priv are not self explaining. They are even suggesting that they are dealing with information which are actually stored in a different variable. As first step, document their meaning. Signed-off-by: Sven Eckelmann <se@simonwunderlich.de> Link: https://github.com/openwrt/openwrt/pull/20707 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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@ -1164,9 +1164,22 @@ struct rtl838x_switch_priv {
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u32 fib_entries;
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int l2_bucket_size;
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struct dentry *dbgfs_dir;
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/** @lags_port_members: Port (bit) is part of a specific LAG */
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u64 lags_port_members[MAX_LAGS];
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/** @lag_primary: port of a LAG is primary (repesenting) and is added to
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* the port matrix
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*/
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u32 lag_primary[MAX_LAGS];
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/**
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* @is_lagmember: Port is part of any LAG but not the first/primary
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* port which needs to be added in the port matrix
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*/
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u32 is_lagmember[57];
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/** @lagmembers: Port (bit) is part of any LAG */
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u64 lagmembers;
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struct workqueue_struct *wq;
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struct notifier_block ne_nb;
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