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uboot-rockchip: backport updates for RK3528

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Added USB boot support and eMMC r/w fixes for RK3528.
Refreshed upstreamed patches while at it.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20375
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Tianling Shen 2025-11-02 17:32:52 +08:00 • committed by Hauke Mehrtens
parent bdb269c163
commit decaf4cc7a
8 changed files with 173 additions and 63 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

21
package/boot/uboot-rockchip/patches/105-spi-rockchip_sfc-Support-sclk_x2-version.patch → package/boot/uboot-rockchip/patches/001-spi-rockchip_sfc-Support-sclk_x2-version.patch
View file

@ -1,27 +1,14 @@
From: Jonas Karlman <jonas@kwiboo.se>
To: Kever Yang <kever.yang@rock-chips.com>,
Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Tom Rini <trini@konsulko.com>,
Jagan Teki <jagan@amarulasolutions.com>
Cc: Quentin Schulz <quentin.schulz@cherry.de>,
u-boot@lists.denx.de, Jonas Karlman <jonas@kwiboo.se>,
Jon Lin <jon.lin@rock-chips.com>
Subject: [PATCH v3 01/10] spi: rockchip_sfc: Support sclk_x2 version
Date: Sun, 31 Aug 2025 11:20:22 +0000 [thread overview]
Message-ID: <20250831112046.2642363-2-jonas@kwiboo.se> (raw)
In-Reply-To: <20250831112046.2642363-1-jonas@kwiboo.se>
From 193563a005edc4e54426458ee6e097c8e4b38874 Mon Sep 17 00:00:00 2001
From: Jon Lin <jon.lin@rock-chips.com>
Date: Sun, 19 Oct 2025 15:47:15 +0000
Subject: [PATCH] spi: rockchip_sfc: Support sclk_x2 version
SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v3: No change
v2: No change
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
drivers/spi/rockchip_sfc.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)

17
package/boot/uboot-rockchip/patches/106-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch → package/boot/uboot-rockchip/patches/002-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch
View file

@ -1,14 +1,7 @@
From 20c950de5e0431464b7068fdb2c6ec4ead3940ad Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
To: Kever Yang <kever.yang@rock-chips.com>,
Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Tom Rini <trini@konsulko.com>
Cc: Quentin Schulz <quentin.schulz@cherry.de>,
u-boot@lists.denx.de, Jonas Karlman <jonas@kwiboo.se>
Subject: [PATCH v3 02/10] rockchip: spl: Add a read_brom_bootsource_id() helper
Date: Sun, 31 Aug 2025 11:20:23 +0000 [thread overview]
Message-ID: <20250831112046.2642363-3-jonas@kwiboo.se> (raw)
In-Reply-To: <20250831112046.2642363-1-jonas@kwiboo.se>
Date: Sun, 19 Oct 2025 15:47:16 +0000
Subject: [PATCH] rockchip: spl: Add a read_brom_bootsource_id() helper
The bootsource ids reported by BootROM of RK3528 and RK3576 for e.g.
SPI NOR and USB differs slightly compared to prior SoCs:
@ -23,9 +16,7 @@ will be used to translate the new values to the common BROM_BOOTSOURCE
enum values on RK3528 and RK3576.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v3: Mention RK3528 in commit message
v2: No change
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/include/asm/arch-rockchip/bootrom.h | 2 ++
arch/arm/mach-rockchip/spl.c | 7 ++++++-

43
package/boot/uboot-rockchip/patches/003-rockchip-rk3528-Implement-read_brom_bootsource_id.patch Normal file
View file

@ -0,0 +1,43 @@
From deee6a1cf623a81cb6de9ebe84cc6d1a393881f8 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 19 Oct 2025 15:47:17 +0000
Subject: [PATCH] rockchip: rk3528: Implement read_brom_bootsource_id()
The bootsource ids reported by BootROM of RK3528 for e.g. USB differs
compared to prior SoCs:
- Booting from USB report a new bootsource id 0x81.
Add a RK3528 specific read_brom_bootsource_id() function to help decode
this new bootsource id value to help support booting from USB on RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/mach-rockchip/rk3528/rk3528.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm/mach-rockchip/rk3528/rk3528.c
+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c
@@ -49,6 +49,21 @@ void board_debug_uart_init(void)
{
}
+u32 read_brom_bootsource_id(void)
+{
+ u32 bootsource_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+ /* Re-map the raw value read from reg to an existing BROM_BOOTSOURCE
+ * enum value to avoid having to create a larger boot_devices table.
+ */
+ if (bootsource_id == 0x81)
+ return BROM_BOOTSOURCE_USB;
+ else if (bootsource_id > BROM_LAST_BOOTSOURCE)
+ log_debug("Unknown bootsource %x\n", bootsource_id);
+
+ return bootsource_id;
+}
+
int arch_cpu_init(void)
{
u32 val;

21
package/boot/uboot-rockchip/patches/107-rockchip-rk3576-Add-SPI-Flash-boot-support.patch → package/boot/uboot-rockchip/patches/004-rockchip-rk3576-Add-SPI-Flash-boot-support.patch
View file

@ -1,14 +1,7 @@
From 06d52d81cbd4275c86a7a150a23ab4d1dee8f435 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
To: Kever Yang <kever.yang@rock-chips.com>,
Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Tom Rini <trini@konsulko.com>
Cc: Quentin Schulz <quentin.schulz@cherry.de>,
u-boot@lists.denx.de, Jonas Karlman <jonas@kwiboo.se>
Subject: [PATCH v3 04/10] rockchip: rk3576: Add SPI Flash boot support
Date: Sun, 31 Aug 2025 11:20:25 +0000 [thread overview]
Message-ID: <20250831112046.2642363-5-jonas@kwiboo.se> (raw)
In-Reply-To: <20250831112046.2642363-1-jonas@kwiboo.se>
Date: Sun, 19 Oct 2025 15:47:18 +0000
Subject: [PATCH] rockchip: rk3576: Add SPI Flash boot support
The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB
differs slightly compared to prior SoCs:
@ -23,13 +16,7 @@ the new bootsource id values and the required boot_devices mapping of
sfc0 and sfc1 to help support booting from SPI flash on RK3576.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Add fspi1m1 pinctrl bootph- props to SoC u-boot.dtsi
- Drop the incomplete support for FSPI1_M0
- Add a short code comment about the re-mapping of bootsource id
v2: No change
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/dts/rk3576-u-boot.dtsi | 46 ++++++++++++++++++++++++++
arch/arm/mach-rockchip/rk3576/rk3576.c | 25 ++++++++++++++

18
package/boot/uboot-rockchip/patches/108-board-rockchip-Add-Radxa-ROCK-4D.patch → package/boot/uboot-rockchip/patches/005-board-rockchip-Add-Radxa-ROCK-4D.patch
View file

@ -1,13 +1,7 @@
From 06cc02fe00d5a6d9ef51aa8852b891c0a5e3cf3e Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
To: Kever Yang <kever.yang@rock-chips.com>,
Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Tom Rini <trini@konsulko.com>, Jonas Karlman <jonas@kwiboo.se>
Cc: Quentin Schulz <quentin.schulz@cherry.de>, u-boot@lists.denx.de
Subject: [PATCH v3 10/10] board: rockchip: Add Radxa ROCK 4D
Date: Sun, 31 Aug 2025 11:20:31 +0000 [thread overview]
Message-ID: <20250831112046.2642363-11-jonas@kwiboo.se> (raw)
In-Reply-To: <20250831112046.2642363-1-jonas@kwiboo.se>
Date: Sun, 19 Oct 2025 15:47:19 +0000
Subject: [PATCH] board: rockchip: Add Radxa ROCK 4D
The Radxa ROCK 4D is a compact single-board computer (SBC) featuring
numerous top-tier functions, features, and expansion options.
@ -27,9 +21,7 @@ or directly from USB when the MASKROM button is pressed, booting
directly from SD-card is not possible on these boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v3: Drop the reset-gpios prop rename
v2: Add comment about the reset-gpios prop rename
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/dts/rk3576-rock-4d-u-boot.dtsi | 10 ++++
arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 ++
@ -297,7 +289,7 @@ v2: Add comment about the reset-gpios prop rename
+CONFIG_ERRNO_STR=y
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -138,6 +138,7 @@ List of mainline supported Rockchip boar
@@ -137,6 +137,7 @@ List of mainline supported Rockchip boar
- ArmSoM Sige5 (sige5-rk3576)
- Firefly ROC-RK3576-PC (roc-pc-rk3576)
- Generic RK3576 (generic-rk3576)

5
package/boot/uboot-rockchip/patches/100-board-rockchip-add-Lunzn-FastRhino-R66S.patch → package/boot/uboot-rockchip/patches/008-board-rockchip-add-Lunzn-FastRhino-R66S.patch
View file

@ -1,6 +1,6 @@
From 03610008ce31b7a780b7864a0a916d945b7234ba Mon Sep 17 00:00:00 2001
From 37a5383059d0c3d8a72394cbffef775042a40acd Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@gmail.com>
Date: Mon, 8 Sep 2025 19:29:55 +0800
Date: Mon, 8 Sep 2025 19:32:18 +0800
Subject: [PATCH] board: rockchip: add Lunzn FastRhino R66S
Lunzn Fastrhino R66S is a high-performance mini router.
@ -14,6 +14,7 @@ Specification:
- 12v DC Jack
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
.../arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi | 3 +
board/rockchip/evb_rk3568/MAINTAINERS | 7 ++

109
package/boot/uboot-rockchip/patches/009-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch Normal file
View file

@ -0,0 +1,109 @@
From 498a9756adf57e94af64e31b144a6698c656c50a Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 14 Jul 2025 20:34:07 +0000
Subject: [PATCH] mmc: rockchip_sdhci: Set xx_TAP_VALUE for RK3528
eMMC erase and write support on RK3528 is somewhat unreliable, sometime
e.g. mmc erase and write commands will fail with an error.
Use the delay line lock value for half card clock cycle, DLL_LOCK_VALUE,
to set a manual xx_TAP_VALUE to fix the unreliable eMMC support.
This is only enabled for RK3528, remaining SoCs still use the automatic
tap value, (DLL_LOCK_VALUE * 2) % 256, same value we configure manually
for RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
drivers/mmc/rockchip_sdhci.c | 27 ++++++++++++++++++++++-----
1 file changed, 22 insertions(+), 5 deletions(-)
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -9,6 +9,7 @@
#include <dm.h>
#include <dm/ofnode.h>
#include <dt-structs.h>
+#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/libfdt.h>
@@ -86,6 +87,9 @@
#define DLL_CMDOUT_SRC_CLK_NEG BIT(28)
#define DLL_CMDOUT_EN_SRC_CLK_NEG BIT(29)
#define DLL_CMDOUT_BOTH_CLK_EDGE BIT(30)
+#define DLL_TAPVALUE_FROM_SW BIT(25)
+#define DLL_TAP_VALUE_PREP(x) FIELD_PREP(GENMASK(15, 8), (x))
+#define DLL_LOCK_VALUE_GET(x) FIELD_GET(GENMASK(7, 0), (x))
#define DLL_LOCK_WO_TMOUT(x) \
((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
@@ -93,6 +97,7 @@
#define ROCKCHIP_MAX_CLKS 3
#define FLAG_INVERTER_FLAG_IN_RXCLK BIT(0)
+#define FLAG_TAPVALUE_FROM_SW BIT(1)
struct rockchip_sdhc_plat {
struct mmc_config cfg;
@@ -317,7 +322,7 @@ static int rk3568_sdhci_config_dll(struc
struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
struct mmc *mmc = host->mmc;
int val, ret;
- u32 extra, txclk_tapnum;
+ u32 extra, txclk_tapnum, dll_tap_value;
if (!enable) {
sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
@@ -347,7 +352,15 @@ static int rk3568_sdhci_config_dll(struc
if (ret)
return ret;
- extra = DWCMSHC_EMMC_DLL_DLYENA | DLL_RXCLK_ORI_GATE;
+ if (data->flags & FLAG_TAPVALUE_FROM_SW)
+ dll_tap_value = DLL_TAPVALUE_FROM_SW |
+ DLL_TAP_VALUE_PREP(DLL_LOCK_VALUE_GET(val) * 2);
+ else
+ dll_tap_value = 0;
+
+ extra = DWCMSHC_EMMC_DLL_DLYENA |
+ DLL_RXCLK_ORI_GATE |
+ dll_tap_value;
if (data->flags & FLAG_INVERTER_FLAG_IN_RXCLK)
extra |= DLL_RXCLK_NO_INVERTER;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
@@ -361,19 +374,22 @@ static int rk3568_sdhci_config_dll(struc
DLL_CMDOUT_BOTH_CLK_EDGE |
DWCMSHC_EMMC_DLL_DLYENA |
data->hs400_cmdout_tapnum |
- DLL_CMDOUT_TAPNUM_FROM_SW;
+ DLL_CMDOUT_TAPNUM_FROM_SW |
+ dll_tap_value;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CMDOUT);
}
extra = DWCMSHC_EMMC_DLL_DLYENA |
DLL_TXCLK_TAPNUM_FROM_SW |
DLL_TXCLK_NO_INVERTER |
- txclk_tapnum;
+ txclk_tapnum |
+ dll_tap_value;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
extra = DWCMSHC_EMMC_DLL_DLYENA |
data->hs400_strbin_tapnum |
- DLL_STRBIN_TAPNUM_FROM_SW;
+ DLL_STRBIN_TAPNUM_FROM_SW |
+ dll_tap_value;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
} else {
/*
@@ -663,6 +679,7 @@ static const struct sdhci_data rk3528_da
.set_ios_post = rk3568_sdhci_set_ios_post,
.set_clock = rk3568_sdhci_set_clock,
.config_dll = rk3568_sdhci_config_dll,
+ .flags = FLAG_TAPVALUE_FROM_SW,
.hs200_txclk_tapnum = 0xc,
.hs400_txclk_tapnum = 0x6,
.hs400_cmdout_tapnum = 0x6,

2
package/boot/uboot-rockchip/patches/103-rockchip-rk3588-generic-Enable-support-for-RK3582.patch
View file

@ -61,7 +61,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
CONFIG_SPL_MAX_SIZE=0x40000
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -149,7 +149,7 @@ List of mainline supported Rockchip boar
@@ -150,7 +150,7 @@ List of mainline supported Rockchip boar
- FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s)
- FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s)
- GameForce Ace (gameforce-ace-rk3588s)