diff --git a/target/linux/rockchip/patches-6.12/011-v6.19-arm64-dts-rockchip-add-eMMC-CQE-support-for-rk3588.patch b/target/linux/rockchip/patches-6.12/001-16-v6.19-arm64-dts-rockchip-add-eMMC-CQE-support-for-rk3588.patch similarity index 100% rename from target/linux/rockchip/patches-6.12/011-v6.19-arm64-dts-rockchip-add-eMMC-CQE-support-for-rk3588.patch rename to target/linux/rockchip/patches-6.12/001-16-v6.19-arm64-dts-rockchip-add-eMMC-CQE-support-for-rk3588.patch diff --git a/target/linux/rockchip/patches-6.12/160-04-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support.patch b/target/linux/rockchip/patches-6.12/036-09-v6.19-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support-RK3528.patch similarity index 60% rename from target/linux/rockchip/patches-6.12/160-04-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support.patch rename to target/linux/rockchip/patches-6.12/036-09-v6.19-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support-RK3528.patch index 4a55a2d18a..2982968818 100644 --- a/target/linux/rockchip/patches-6.12/160-04-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support.patch +++ b/target/linux/rockchip/patches-6.12/036-09-v6.19-phy-rockchip-naneng-combphy-Fix-PCIe-L1ss-support-RK3528.patch @@ -1,23 +1,21 @@ +From a2a18e5da64f8da306fa97c397b4c739ea776f37 Mon Sep 17 00:00:00 2001 From: Shawn Lin -To: Vinod Koul -Cc: Kishon Vijay Abraham I , - Heiko Stuebner , Yao Zi , - linux-phy@lists.infradead.org, - linux-rockchip@lists.infradead.org, - Shawn Lin -Subject: [PATCH] phy: rockchip: naneng-combphy: Fix PCIe L1ss support -Date: Thu, 13 Nov 2025 11:00:28 +0800 [thread overview] -Message-ID: <1763002828-212219-1-git-send-email-shawn.lin@rock-chips.com> (raw) +Date: Tue, 18 Nov 2025 17:52:05 +0800 +Subject: [PATCH] phy: rockchip: naneng-combphy: Fix PCIe L1ss support RK3528 -Need to control the delay PLL turnoff time if PCIe works on -L1 PM substates. +When PCIe link enters L1 PM substates, the PHY will turn off its +PLL for power-saving. However, it turns off the PLL too fast which +leads the PHY to be broken. According to the PHY document, we need +to delay PLL turnoff time. Fixes: bbcca4fac873 ("phy: rockchip: naneng-combphy: Add RK3528 support") Signed-off-by: Shawn Lin +Reviewed-by: Neil Armstrong +Link: https://patch.msgid.link/1763459526-35004-1-git-send-email-shawn.lin@rock-chips.com +Signed-off-by: Vinod Koul --- - - drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++ - 1 file changed, 8 insertions(+) + drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 7 +++++++ + 1 file changed, 7 insertions(+) --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -31,14 +29,13 @@ Signed-off-by: Shawn Lin #define RK3528_PHYREG6 0x18 #define RK3528_PHYREG6_PLL_KVCO GENMASK(12, 10) #define RK3528_PHYREG6_PLL_KVCO_VALUE 0x2 -@@ -504,6 +507,11 @@ static int rk3528_combphy_cfg(struct roc +@@ -504,6 +507,10 @@ static int rk3528_combphy_cfg(struct roc case REF_CLOCK_100MHz: rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); if (priv->type == PHY_TYPE_PCIE) { + /* Gate_tx_pck_sel length select for L1ss support */ + rockchip_combphy_updatel(priv, RK3528_PHYREG5_GATE_TX_PCK_SEL, -+ RK3528_PHYREG5_GATE_TX_PCK_DLY_PLL_OFF, -+ RK3528_PHYREG5); ++ RK3528_PHYREG5_GATE_TX_PCK_DLY_PLL_OFF, RK3528_PHYREG5); + /* PLL KVCO tuning fine */ val = FIELD_PREP(RK3528_PHYREG6_PLL_KVCO, RK3528_PHYREG6_PLL_KVCO_VALUE); diff --git a/target/linux/rockchip/patches-6.12/052-v6.18-arm64-dts-rockchip-Add-devicetree-for-the-FriendlyElec-Na.patch b/target/linux/rockchip/patches-6.12/052-v6.19-arm64-dts-rockchip-Add-devicetree-for-the-FriendlyElec-Na.patch similarity index 100% rename from target/linux/rockchip/patches-6.12/052-v6.18-arm64-dts-rockchip-Add-devicetree-for-the-FriendlyElec-Na.patch rename to target/linux/rockchip/patches-6.12/052-v6.19-arm64-dts-rockchip-Add-devicetree-for-the-FriendlyElec-Na.patch diff --git a/target/linux/rockchip/patches-6.12/070-26-v6.18-arm64-dts-rockchip-Add-PCIe-Gen2x1-controller-for-RK3528.patch b/target/linux/rockchip/patches-6.12/070-26-v6.19-arm64-dts-rockchip-Add-PCIe-Gen2x1-controller-for-RK3528.patch similarity index 100% rename from target/linux/rockchip/patches-6.12/070-26-v6.18-arm64-dts-rockchip-Add-PCIe-Gen2x1-controller-for-RK3528.patch rename to target/linux/rockchip/patches-6.12/070-26-v6.19-arm64-dts-rockchip-Add-PCIe-Gen2x1-controller-for-RK3528.patch diff --git a/target/linux/rockchip/patches-6.12/071-14-v6.18-arm64-dts-rockchip-Enable-PCIe-controller-on-Radxa-E20C.patch b/target/linux/rockchip/patches-6.12/071-14-v6.19-arm64-dts-rockchip-Enable-PCIe-controller-on-Radxa-E20C.patch similarity index 100% rename from target/linux/rockchip/patches-6.12/071-14-v6.18-arm64-dts-rockchip-Enable-PCIe-controller-on-Radxa-E20C.patch rename to target/linux/rockchip/patches-6.12/071-14-v6.19-arm64-dts-rockchip-Enable-PCIe-controller-on-Radxa-E20C.patch