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treewide: dts: fix spi-gpio chip select GPIO polarity

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The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.

[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
      device node     | cs-gpio       | CS pin state active | Note
      ================+===============+=====================+=====
      spi-cs-high     | -             | H                   |
      -               | -             | L                   |
      spi-cs-high     | ACTIVE_HIGH   | H                   |
      -               | ACTIVE_HIGH   | L                   | 1
      spi-cs-high     | ACTIVE_LOW    | H                   | 2
      -               | ACTIVE_LOW    | L                   |

      Notes:
      1) Should print a warning about polarity inversion.
         Here it would be wise to avoid and define the gpio as
         ACTIVE_LOW.
      2) Should print a warning about polarity inversion
         because ACTIVE_LOW is overridden by spi-cs-high.
         Should be generally avoided and be replaced by
         spi-cs-high + ACTIVE_HIGH.
```

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Shiji Yang 2025-09-01 09:17:49 +08:00 • committed by Hauke Mehrtens
parent b291e0ded4
commit c2e5bded8d
8 changed files with 8 additions and 8 deletions
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2
target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
View file

@ -46,7 +46,7 @@
sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
gpio_hc595: gpio_spi@0 {

2
target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts
View file

@ -26,7 +26,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio@0 {

2
target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts
View file

@ -39,7 +39,7 @@
sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio@0 {

2
target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts
View file

@ -25,7 +25,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio@0 {

2
target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
View file

@ -23,7 +23,7 @@
sck-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio@0 {

2
target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
View file

@ -25,7 +25,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>; // 74HC595 RCLK (Register Clock)
num-chipselects = <1>;
led_gpio: led_gpio@0 {

2
target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
View file

@ -119,7 +119,7 @@
gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>;
cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
cs-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
shift_io: shift_io@0 {

2
target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi
View file

@ -24,7 +24,7 @@
sck-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
gpio_hc595: gpio_hc595@0 {