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realtek: mdio: clarify rtl93xx bus C22/C45 setup
Now that reset() and setup_polling() functions are split, clarify the documentation about the C22/C45 register setup. It is important for all phy accesses and must be configured during reset. Of course a side effect is, that the SoC adapts its polling. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/21968 Signed-off-by: Robert Marko <robimarko@gmail.com>
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1 changed files with 2 additions and 8 deletions
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@ -722,7 +722,7 @@ static int rtmdio_930x_reset(struct mii_bus *bus)
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regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_PORT0_15_POLLING_SEL + reg, mask, val);
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}
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/* Define c22/c45 bus polling */
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/* Define C22/C45 bus feature set */
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for (int addr = 0; addr < RTMDIO_MAX_SMI_BUS; addr++) {
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mask = BIT(16 + addr);
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val = ctrl->smi_bus_isc45[addr] ? mask : 0;
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@ -825,14 +825,8 @@ static int rtmdio_931x_reset(struct mii_bus *bus)
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regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_SEL + (i * 4), poll_sel[i]);
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}
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/* Configure c22/c45 polling (bit 1 of SMI_SETX_FMT_SEL)
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*
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* NOTE: this seems to be needed before accessing the bus though
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* it should only apply to the SMI polling. Not setting c22/c45 here
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* apparently causes garbage being read below.
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*/
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/* Define C22/C45 bus feature set */
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for (int i = 0; i < RTMDIO_MAX_SMI_BUS; i++) {
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/* bus is polled in c45 */
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if (ctrl->smi_bus_isc45[i])
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c45_mask |= 0x2 << (i * 2); /* Std. C45, non-standard is 0x3 */
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}
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