mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2026-02-19 10:01:15 +01:00
realtek: move common GS1920-24HP parts to common definitions
Move common parts shared with GS1920-24HPv2 from v1's DTS and image definition into a common DTSI and device definition to prepare adding support for GS1920-24HPv2. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21944 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Jonas Jelonek
Hauke Mehrtens
parent
7f67ec0b34
commit
b449b8cd3a
3 changed files with 282 additions and 263 deletions
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@ -1,22 +1,11 @@
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/dts-v1/;
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#include "rtl839x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "rtl839x_zyxel_gs1920-24hp-common.dtsi"
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/ {
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compatible = "zyxel,gs1920-24hp-v1", "realtek,rtl8392-soc";
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model = "Zyxel GS1920-24HPv1";
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aliases {
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led-boot = &led_sys;
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led-failsafe = &led_sys;
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led-running = &led_sys;
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led-upgrade = &led_sys;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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@ -26,29 +15,12 @@
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stdout-path = "serial0:9600n8";
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-leds";
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led_sys: sys {
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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};
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alarm {
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gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_FAULT;
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color = <LED_COLOR_ID_RED>;
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};
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locator {
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_INDICATOR;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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keys {
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@ -61,260 +33,56 @@
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linux,code = <KEY_RESTART>;
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};
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};
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};
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/* i2c of the lower left SFP cage: port 25 */
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp0: sfp-p25 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 23 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the upper left SFP cage: port 26 */
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp-p26 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the lower right SFP cage: port 27 */
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i2c2: i2c-gpio-2 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp2: sfp-p27 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c2>;
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los-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 13 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the upper right SFP cage: port 28 */
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i2c3: i2c-gpio-3 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp3: sfp-p28 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c3>;
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los-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 20 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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};
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/* i2c for hwmon/PoE */
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i2c4: i2c-gpio-4 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio0 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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adt7468: adt7468@2e {
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compatible = "adi,adt7468";
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reg = <0x2e>;
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};
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&i2c4 {
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adt7468: adt7468@2e {
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compatible = "adi,adt7468";
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reg = <0x2e>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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&flash_partitions {
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partition@20000 {
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label = "reserved";
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reg = <0x20000 0x90000>;
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read-only;
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};
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@b0000 {
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reg = <0xb0000 0xf50000>;
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label = "factory";
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partition@0 {
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label = "bootbase";
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reg = <0x0 0x20000>;
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read-only;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader";
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reg = <0x0 0x10000>;
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};
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factory_macaddr: macaddr@1fff8 {
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reg = <0x1fff8 0x6>;
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};
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};
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};
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partition@20000 {
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label = "reserved";
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reg = <0x20000 0x90000>;
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read-only;
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};
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partition@b0000 {
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reg = <0xb0000 0xf50000>;
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label = "factory";
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader";
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reg = <0x0 0x10000>;
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};
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partition@10000 {
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label = "firmware";
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reg = <0x10000 0xf40000>;
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compatible = "openwrt,uimage", "denx,uimage";
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};
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};
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partition@10000 {
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label = "firmware";
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reg = <0x10000 0xf40000>;
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compatible = "openwrt,uimage", "denx,uimage";
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};
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};
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};
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ðernet0 {
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nvmem-cells = <&factory_macaddr>;
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nvmem-cell-names = "mac-address";
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};
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&mdio_bus0 {
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/* External phy RTL8218B #1 */
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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/* External phy RTL8218B #2 */
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EXTERNAL_PHY(8)
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EXTERNAL_PHY(9)
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EXTERNAL_PHY(10)
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EXTERNAL_PHY(11)
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EXTERNAL_PHY(12)
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EXTERNAL_PHY(13)
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EXTERNAL_PHY(14)
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EXTERNAL_PHY(15)
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/* External phy RTL8218B #3 */
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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/* External phy RTL8214FC #1 */
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EXTERNAL_SFP_PHY_FULL(48, 0)
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EXTERNAL_SFP_PHY_FULL(49, 1)
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EXTERNAL_SFP_PHY_FULL(50, 2)
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EXTERNAL_SFP_PHY_FULL(51, 3)
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT_SDS(0, 1, 0, qsgmii)
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SWITCH_PORT_SDS(1, 2, 0, qsgmii)
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SWITCH_PORT_SDS(2, 3, 0, qsgmii)
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SWITCH_PORT_SDS(3, 4, 0, qsgmii)
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SWITCH_PORT_SDS(4, 5, 1, qsgmii)
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SWITCH_PORT_SDS(5, 6, 1, qsgmii)
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SWITCH_PORT_SDS(6, 7, 1, qsgmii)
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SWITCH_PORT_SDS(7, 8, 1, qsgmii)
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SWITCH_PORT_SDS(8, 9, 2, qsgmii)
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SWITCH_PORT_SDS(9, 10, 2, qsgmii)
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SWITCH_PORT_SDS(10, 11, 2, qsgmii)
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SWITCH_PORT_SDS(11, 12, 2, qsgmii)
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SWITCH_PORT_SDS(12, 13, 3, qsgmii)
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SWITCH_PORT_SDS(13, 14, 3, qsgmii)
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SWITCH_PORT_SDS(14, 15, 3, qsgmii)
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SWITCH_PORT_SDS(15, 16, 3, qsgmii)
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SWITCH_PORT_SDS(16, 17, 4, qsgmii)
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SWITCH_PORT_SDS(17, 18, 4, qsgmii)
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SWITCH_PORT_SDS(18, 19, 4, qsgmii)
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SWITCH_PORT_SDS(19, 20, 4, qsgmii)
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SWITCH_PORT_SDS(20, 21, 5, qsgmii)
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SWITCH_PORT_SDS(21, 22, 5, qsgmii)
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SWITCH_PORT_SDS(22, 23, 5, qsgmii)
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SWITCH_PORT_SDS(23, 24, 5, qsgmii)
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SWITCH_PORT_SDS(48, 25, 12, qsgmii)
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SWITCH_PORT_SDS(49, 26, 12, qsgmii)
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SWITCH_PORT_SDS(50, 27, 12, qsgmii)
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SWITCH_PORT_SDS(51, 28, 12, qsgmii)
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/* CPU-Port */
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port@52 {
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ethernet = <ðernet0>;
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reg = <52>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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&mdio_aux {
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status = "okay";
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gpio1: expander@3 {
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compatible = "realtek,rtl8231";
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reg = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&gpio1 0 0 37>;
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led-controller {
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compatible = "realtek,rtl8231-leds";
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status = "disabled";
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};
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};
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};
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247
target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi
Normal file
247
target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi
Normal file
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@ -0,0 +1,247 @@
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/dts-v1/;
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#include "rtl839x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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led-boot = &led_sys;
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led-failsafe = &led_sys;
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led-running = &led_sys;
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led-upgrade = &led_sys;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-leds";
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led_sys: sys {
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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};
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locator {
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_INDICATOR;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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/* i2c of port 25 SFP cage */
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp0: sfp-p25 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 23 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of port 26 SFP cage */
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp-p26 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of port 27 SFP cage */
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i2c2: i2c-gpio-2 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp2: sfp-p27 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c2>;
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los-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 13 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of port 28 SFP cage */
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i2c3: i2c-gpio-3 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp3: sfp-p28 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c3>;
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los-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 20 GPIO_ACTIVE_LOW>;
|
||||
tx-fault-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* i2c for hwmon/PoE */
|
||||
i2c4: i2c-gpio-4 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpio0 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
|
||||
flash_partitions: partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "bootbase";
|
||||
reg = <0x0 0x20000>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
factory_macaddr: macaddr@1fff8 {
|
||||
reg = <0x1fff8 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
nvmem-cells = <&factory_macaddr>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&mdio_bus0 {
|
||||
/* External phy RTL8218B #1 */
|
||||
EXTERNAL_PHY(0)
|
||||
EXTERNAL_PHY(1)
|
||||
EXTERNAL_PHY(2)
|
||||
EXTERNAL_PHY(3)
|
||||
EXTERNAL_PHY(4)
|
||||
EXTERNAL_PHY(5)
|
||||
EXTERNAL_PHY(6)
|
||||
EXTERNAL_PHY(7)
|
||||
|
||||
/* External phy RTL8218B #2 */
|
||||
EXTERNAL_PHY(8)
|
||||
EXTERNAL_PHY(9)
|
||||
EXTERNAL_PHY(10)
|
||||
EXTERNAL_PHY(11)
|
||||
EXTERNAL_PHY(12)
|
||||
EXTERNAL_PHY(13)
|
||||
EXTERNAL_PHY(14)
|
||||
EXTERNAL_PHY(15)
|
||||
|
||||
/* External phy RTL8218B #3 */
|
||||
EXTERNAL_PHY(16)
|
||||
EXTERNAL_PHY(17)
|
||||
EXTERNAL_PHY(18)
|
||||
EXTERNAL_PHY(19)
|
||||
EXTERNAL_PHY(20)
|
||||
EXTERNAL_PHY(21)
|
||||
EXTERNAL_PHY(22)
|
||||
EXTERNAL_PHY(23)
|
||||
};
|
||||
|
||||
&switch0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
SWITCH_PORT_SDS(0, 1, 0, qsgmii)
|
||||
SWITCH_PORT_SDS(1, 2, 0, qsgmii)
|
||||
SWITCH_PORT_SDS(2, 3, 0, qsgmii)
|
||||
SWITCH_PORT_SDS(3, 4, 0, qsgmii)
|
||||
SWITCH_PORT_SDS(4, 5, 1, qsgmii)
|
||||
SWITCH_PORT_SDS(5, 6, 1, qsgmii)
|
||||
SWITCH_PORT_SDS(6, 7, 1, qsgmii)
|
||||
SWITCH_PORT_SDS(7, 8, 1, qsgmii)
|
||||
|
||||
SWITCH_PORT_SDS(8, 9, 2, qsgmii)
|
||||
SWITCH_PORT_SDS(9, 10, 2, qsgmii)
|
||||
SWITCH_PORT_SDS(10, 11, 2, qsgmii)
|
||||
SWITCH_PORT_SDS(11, 12, 2, qsgmii)
|
||||
SWITCH_PORT_SDS(12, 13, 3, qsgmii)
|
||||
SWITCH_PORT_SDS(13, 14, 3, qsgmii)
|
||||
SWITCH_PORT_SDS(14, 15, 3, qsgmii)
|
||||
SWITCH_PORT_SDS(15, 16, 3, qsgmii)
|
||||
|
||||
SWITCH_PORT_SDS(16, 17, 4, qsgmii)
|
||||
SWITCH_PORT_SDS(17, 18, 4, qsgmii)
|
||||
SWITCH_PORT_SDS(18, 19, 4, qsgmii)
|
||||
SWITCH_PORT_SDS(19, 20, 4, qsgmii)
|
||||
SWITCH_PORT_SDS(20, 21, 5, qsgmii)
|
||||
SWITCH_PORT_SDS(21, 22, 5, qsgmii)
|
||||
SWITCH_PORT_SDS(22, 23, 5, qsgmii)
|
||||
SWITCH_PORT_SDS(23, 24, 5, qsgmii)
|
||||
|
||||
/* CPU-Port */
|
||||
port@52 {
|
||||
ethernet = <ðernet0>;
|
||||
reg = <52>;
|
||||
phy-mode = "internal";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio_aux {
|
||||
status = "okay";
|
||||
|
||||
gpio1: expander@3 {
|
||||
compatible = "realtek,rtl8231";
|
||||
reg = <3>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&gpio1 0 0 37>;
|
||||
|
||||
led-controller {
|
||||
compatible = "realtek,rtl8231-leds";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -98,19 +98,15 @@ define Device/zyxel_gs1900-48-a1
|
|||
endef
|
||||
TARGET_DEVICES += zyxel_gs1900-48-a1
|
||||
|
||||
define Device/zyxel_gs1920-24hp-v1
|
||||
FLASH_ADDR := 0xb40c0000
|
||||
define Device/zyxel_gs1920-24hp
|
||||
ifeq ($(IB),)
|
||||
ARTIFACTS := loader.bin
|
||||
ARTIFACT/loader.bin := \
|
||||
rt-loader-standalone | \
|
||||
zynsig
|
||||
endif
|
||||
SOC := rtl8392
|
||||
IMAGE_SIZE := 12144k
|
||||
DEVICE_VENDOR := Zyxel
|
||||
DEVICE_MODEL := GS1920-24HP
|
||||
DEVICE_VARIANT := v1
|
||||
DEVICE_PACKAGES := \
|
||||
kmod-hwmon-lm85
|
||||
KERNEL := \
|
||||
|
|
@ -124,4 +120,12 @@ endif
|
|||
rt-compress | \
|
||||
rt-loader
|
||||
endef
|
||||
|
||||
define Device/zyxel_gs1920-24hp-v1
|
||||
$(Device/zyxel_gs1920-24hp)
|
||||
SOC := rtl8392
|
||||
FLASH_ADDR := 0xb40c0000
|
||||
IMAGE_SIZE := 12144k
|
||||
DEVICE_VARIANT := v1
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_gs1920-24hp-v1
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue