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realtek: mdio: use helper for smi topology setup
On RTL930x, RTL931x and even RTL838x the smi topology is configured very similar. There is a bus mapping (RTL930x and RTL931x) and a port mapping (all three). Define a common helper that can take care of this setup and call it before bus registration. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22008 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen
Robert Marko
parent
4026f8843f
commit
afbbf21714
1 changed files with 38 additions and 44 deletions
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@ -44,6 +44,7 @@
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#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2 (0xa1c0)
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#define RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3 (0xa1c4)
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#define RTMDIO_838X_SMI_POLL_CTRL (0xa17c)
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#define RTMDIO_838X_SMI_PORT0_5_ADDR_CTRL (0xa1c8)
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#define RTMDIO_839X_CMD_FAIL BIT(1)
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#define RTMDIO_839X_CMD_READ_C22 0
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@ -77,7 +78,7 @@
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#define RTMDIO_930X_SMI_10G_POLLING_REG0_CFG (0xCBB4)
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#define RTMDIO_930X_SMI_10G_POLLING_REG9_CFG (0xCBB8)
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#define RTMDIO_930X_SMI_10G_POLLING_REG10_CFG (0xCBBC)
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#define RTMDIO_930X_SMI_PORT0_5_ADDR (0xCB80)
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#define RTMDIO_930X_SMI_PORT0_5_ADDR_CTRL (0xCB80)
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#define RTMDIO_931X_CMD_FAIL BIT(1)
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#define RTMDIO_931X_CMD_READ_C22 0
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@ -96,7 +97,7 @@
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#define RTMDIO_931X_SMI_INDRT_ACCESS_MMD_CTRL (0x0C18)
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#define RTMDIO_931X_MAC_L2_GLOBAL_CTRL2 (0x1358)
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#define RTMDIO_931X_SMI_PORT_POLLING_SEL (0x0C9C)
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#define RTMDIO_931X_SMI_PORT_ADDR (0x0C74)
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#define RTMDIO_931X_SMI_PORT_ADDR_CTRL (0x0C74)
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#define RTMDIO_931X_SMI_10GPHY_POLLING_SEL0 (0x0CF0)
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#define RTMDIO_931X_SMI_10GPHY_POLLING_SEL1 (0x0CF4)
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#define RTMDIO_931X_SMI_10GPHY_POLLING_SEL2 (0x0CF8)
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@ -183,6 +184,8 @@ struct rtmdio_ctrl {
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struct rtmdio_config {
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int cpu_port;
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int raw_page;
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int bus_map_base;
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int port_map_base;
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int (*read_mmd_phy)(struct mii_bus *bus, u32 port, u32 addr, u32 reg, u32 *val);
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int (*read_phy)(struct mii_bus *bus, u32 port, u32 page, u32 reg, u32 *val);
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int (*reset)(struct mii_bus *bus);
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@ -558,6 +561,31 @@ static int rtmdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
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return 0;
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}
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static void rtmdio_setup_smi_topology(struct mii_bus *bus)
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{
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struct rtmdio_ctrl *ctrl = bus->priv;
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u32 reg, mask, val;
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for (int addr = 0; addr < ctrl->cfg->cpu_port; addr++) {
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if (ctrl->smi_bus[addr] < 0)
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continue;
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if (ctrl->cfg->bus_map_base) {
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reg = (addr / 16) * 4;
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mask = 0x3 << ((addr % 16) * 2);
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val = ctrl->smi_bus[addr] << ((addr % 16) * 2);
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regmap_update_bits(ctrl->map, ctrl->cfg->bus_map_base + reg, mask, val);
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}
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if (ctrl->cfg->port_map_base) {
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reg = (addr / 6) * 4;
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mask = 0x1f << ((addr % 6) * 5);
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val = ctrl->smi_addr[addr] << ((addr % 6) * 5);
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regmap_update_bits(ctrl->map, ctrl->cfg->port_map_base + reg, mask, val);
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}
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}
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}
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static u32 rtmdio_get_phy_id(struct phy_device *phydev)
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{
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if (!phydev)
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@ -670,23 +698,7 @@ static int rtmdio_839x_reset(struct mii_bus *bus)
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static int rtmdio_930x_reset(struct mii_bus *bus)
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{
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struct rtmdio_ctrl *ctrl = bus->priv;
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unsigned int reg, mask, val;
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/* Define bus topology */
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for (int addr = 0; addr < ctrl->cfg->cpu_port; addr++) {
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if (ctrl->smi_bus[addr] < 0)
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continue;
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reg = (addr / 6) * 4;
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mask = 0x1f << ((addr % 6) * 5);
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val = ctrl->smi_addr[addr] << (ffs(mask) - 1);
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regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_PORT0_5_ADDR + reg, mask, val);
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reg = (addr / 16) * 4;
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mask = 0x3 << ((addr % 16) * 2);
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val = ctrl->smi_bus[addr] << (ffs(mask) - 1);
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regmap_update_bits(ctrl->map, RTMDIO_930X_SMI_PORT0_15_POLLING_SEL + reg, mask, val);
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}
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unsigned int mask, val;
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/* Define C22/C45 bus feature set */
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for (int addr = 0; addr < RTMDIO_MAX_SMI_BUS; addr++) {
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@ -762,43 +774,18 @@ static void rtmdio_930x_setup_polling(struct mii_bus *bus)
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static int rtmdio_931x_reset(struct mii_bus *bus)
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{
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struct rtmdio_ctrl *ctrl = bus->priv;
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u32 poll_sel[4] = { 0 };
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u32 poll_ctrl = 0;
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u32 c45_mask = 0;
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pr_info("%s called\n", __func__);
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/* Disable port polling for configuration purposes */
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regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_CTRL, 0);
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regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_CTRL + 4, 0);
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msleep(100);
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/* Mapping of port to phy-addresses on an SMI bus */
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for (int addr = 0; addr < ctrl->cfg->cpu_port; addr++) {
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u32 pos;
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if (ctrl->smi_bus[addr] < 0)
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continue;
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pos = (addr % 6) * 5;
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regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_PORT_ADDR + (addr / 6) * 4,
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0x1f << pos, ctrl->smi_addr[addr] << pos);
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pos = (addr * 2) % 32;
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poll_sel[addr / 16] |= ctrl->smi_bus[addr] << pos;
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poll_ctrl |= BIT(20 + ctrl->smi_bus[addr]);
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}
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/* Configure which SMI bus is behind which port number */
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for (int i = 0; i < RTMDIO_MAX_SMI_BUS; i++) {
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pr_info("poll sel %d, %08x\n", i, poll_sel[i]);
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regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_SEL + (i * 4), poll_sel[i]);
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}
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/* Define C22/C45 bus feature set */
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for (int i = 0; i < RTMDIO_MAX_SMI_BUS; i++) {
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if (ctrl->smi_bus_isc45[i])
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c45_mask |= 0x2 << (i * 2); /* Std. C45, non-standard is 0x3 */
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}
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pr_info("%s: c45_mask: %08x", __func__, c45_mask);
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regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1, GENMASK(7, 0), c45_mask);
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return 0;
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@ -948,6 +935,8 @@ static int rtmdio_probe(struct platform_device *pdev)
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snprintf(bus->id, MII_BUS_ID_SIZE, "realtek-mdio");
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device_set_node(&bus->dev, of_fwnode_handle(dev->of_node));
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rtmdio_setup_smi_topology(bus);
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ret = devm_mdiobus_register(dev, bus);
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if (ret)
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return ret;
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@ -961,6 +950,7 @@ static int rtmdio_probe(struct platform_device *pdev)
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static const struct rtmdio_config rtmdio_838x_cfg = {
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.cpu_port = 28,
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.raw_page = 4095,
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.port_map_base = RTMDIO_838X_SMI_PORT0_5_ADDR_CTRL,
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.read_mmd_phy = rtmdio_838x_read_mmd_phy,
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.read_phy = rtmdio_838x_read_phy,
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.reset = rtmdio_838x_reset,
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@ -982,6 +972,8 @@ static const struct rtmdio_config rtmdio_839x_cfg = {
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static const struct rtmdio_config rtmdio_930x_cfg = {
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.cpu_port = 28,
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.raw_page = 4095,
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.bus_map_base = RTMDIO_930X_SMI_PORT0_15_POLLING_SEL,
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.port_map_base = RTMDIO_930X_SMI_PORT0_5_ADDR_CTRL,
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.read_mmd_phy = rtmdio_930x_read_mmd_phy,
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.read_phy = rtmdio_930x_read_phy,
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.reset = rtmdio_930x_reset,
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@ -993,6 +985,8 @@ static const struct rtmdio_config rtmdio_930x_cfg = {
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static const struct rtmdio_config rtmdio_931x_cfg = {
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.cpu_port = 56,
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.raw_page = 8191,
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.bus_map_base = RTMDIO_931X_SMI_PORT_POLLING_SEL,
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.port_map_base = RTMDIO_931X_SMI_PORT_ADDR_CTRL,
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.read_mmd_phy = rtmdio_931x_read_mmd_phy,
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.read_phy = rtmdio_931x_read_phy,
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.reset = rtmdio_931x_reset,
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