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mediatek: mt7987: sync mt7987.dtsi with MediaTek SDK

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Make sure uart0 got all required clocks assigned.

Fixes: 1c3b32c45a ("mediatek: fix uart clocks in MT7987 infracfg clock driver")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2025-11-25 16:32:41 +00:00
parent b947b6af04
commit 7af6029644
1 changed files with 7 additions and 2 deletions
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9
target/linux/mediatek/dts/mt7987.dtsi
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@ -679,9 +679,14 @@
"mediatek,mt6577-uart";
reg = <0 0x11000000 0 0x100>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topckgen CLK_TOP_UART_SEL>,
<&infracfg CLK_INFRA_52M_UART0_CK>;
clocks = <&infracfg CLK_INFRA_52M_UART0_CK>,
<&infracfg CLK_INFRA_66M_UART0_PCK>;
clock-names = "baud", "bus";
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
<&infracfg CLK_INFRA_MUX_UART0_SEL>;
assigned-clock-parents = <&topckgen
CLK_TOP_CB_CKSQ_40M>,
<&topckgen CLK_TOP_UART_SEL>;
status = "disabled";
};