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qualcommax: ipq50xx: Add support for CMCC PZ-L8
CMCC PZ-L8 is a 2.4/5 GHz band 11ax (Wi-Fi 6) router, based on IPQ5000.
Specifications:
- SoC : Qualcomm IPQ5000
- RAM : Integrated 256MiB DDR3L
- Flash : 128 MiB SPI-NAND (ESMT F50D1G41LB)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm IPQ5000 (SoC)
- 5 GHz : Qualcomm Atheros QCN6102
- Ethernet : 4x 10/100/1000 Mbps
- switch : Qualcomm Atheros QCA8337
- LEDs/Keys (GPIO) : 2x LEDs, 2x Keys
- UART : Through-hole on PCB, 4pins in the middle of the black aluminum heat sink
- assignment : 3.3V, GND,TX, RX (from left to right)
- settings : 115200n8
- Power : 12 VDC, 1 A
Flashing Instructions:
1. SSH Method
(1) Enable SSH on the stock firmware
a. Version 501.8 and 501.9:
Log in to http://192.168.10.1 with the password on the sticker
Append "/admin/system/admin" to the URL and press Enter
Delete "Dropbear instance", click "Add instance", then "Save and Apply"
Reboot the router
b. Version 501.11 and 501.12:
While the router is running the stock firmware, press and hold the reset button for 20-30 seconds
Open http://192.168.10.1:56781 and login with username "root" and the password on the sticker
Run "vi /etc/config/dropbear" and delete the line "option enable '0'"
Reboot the router
(2) Upload the factory.ubi file to router's /tmp directory (using scp or wget)
and execute the following commands in the router's shell
export rootfs=$(cat /proc/mtd | grep rootfs | grep -v _ | cut -d: -f1)
ubidetach -f -p /dev/${rootfs}
ubiformat /dev/${rootfs} -y -f /tmp/factory.ubi
2. U-Boot Method using UBI Image
Place the factory.ubi file on your TFTP server, enter U-Boot CLI and exec these commands
tftpboot <your_tftp_server_ip>:factory.ubi
flash rootfs
reset
3. U-Boot Method using initramfs Image
(1) Place the openwrt-*-initramfs-fit-uImage.itb file on your TFTP server
and rename it to initramfs.bin
(2) Enable serial console, enter to U-Boot CLI and exec these commands
tftpboot <your_tftp_server_ip>:initramfs.bin
bootm
(3) Once boot completed, upload the sysupgrade.bin file to router's /tmp directory
(using scp or wget) and execute the following command in openwrt shell
sysupgrade -n /tmp/sysupgrade.bin
Switching to the Stock Firmware:
Please follow the commit 3b7d72bc2e
Partition Layout (Stock Firmware):
0x000000000000-0x000000080000 : "0:SBL1"
0x000000080000-0x000000100000 : "0:MIBIB"
0x000000100000-0x000000140000 : "0:BOOTCONFIG"
0x000000140000-0x000000180000 : "0:BOOTCONFIG1"
0x000000180000-0x000000280000 : "0:QSEE"
0x000000280000-0x000000380000 : "0:QSEE_1"
0x000000380000-0x0000003c0000 : "0:DEVCFG"
0x0000003c0000-0x000000400000 : "0:DEVCFG_1"
0x000000400000-0x000000440000 : "0:CDT"
0x000000440000-0x000000480000 : "0:CDT_1"
0x000000480000-0x000000500000 : "0:APPSBLENV"
0x000000500000-0x000000640000 : "0:APPSBL"
0x000000640000-0x000000780000 : "0:APPSBL_1"
0x000000780000-0x000000880000 : "0:ART"
0x000000880000-0x000000900000 : "0:TRAINING"
0x000000900000-0x000004300000 : "rootfs"
0x000004300000-0x000007d00000 : "rootfs_1"
Notes:
This device is almost the same as ELECOM WRC-X3000GS2, including partition layout and the dual-boot feature.
Known Issues:
- All Wi-Fi related peripherals are disabled in device tree, since 256 MiB RAM is too few for ath11k.
- This device has another version with nand flash FM25SL01, which is not supported at the moment.
https://github.com/immortalwrt/immortalwrt/blob/master/target/linux/mediatek/patches-6.12/342-mtd-spinand-Support-fmsh.patch
MAC Addresses:
Interface MAC Address Location (binary)
LAN A4:39:B6:xx:xx:9D (0:ART, 0x00-0x05)
WAN A4:39:B6:xx:xx:9E (0:ART, 0x06-0x0B)
2.4 GHz A4:39:B6:xx:xx:9F (0:ART, 0x0C-0x11)
5 GHz A4:39:B6:xx:xx:A0 (0:ART, 0x12-0x17)
Signed-off-by: Chang Liu <jssqliuchang@gmail.com>
This commit is contained in:
parent
26ddab47d9
commit
5ab6e6011f
6 changed files with 499 additions and 0 deletions
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@ -8,6 +8,7 @@ touch /etc/config/ubootenv
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board=$(board_name)
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case "$board" in
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cmcc,pz-l8|\
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elecom,wrc-x3000gs2|\
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iodata,wn-dax3000gr)
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ubootenv_add_mtd "0:appsblenv" "0x0" "0x40000" "0x20000"
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@ -0,0 +1,481 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ipq5018.dtsi"
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#include "ipq5018-ess.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "CMCC PZ-L8";
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compatible = "cmcc,pz-l8", "qcom,ipq5018";
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aliases {
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serial0 = &blsp1_uart1;
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led-boot = &led_wan;
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led-failsafe = &led_lan;
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led-running = &led_wan;
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led-upgrade = &led_lan;
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label-mac-device = <&dp1>;
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};
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chosen {
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bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset-button {
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label = "reset";
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gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps-button {
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label = "wps";
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gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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led_wan: led-0 {
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gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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default-state = "off";
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};
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led_lan: led-1 {
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gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_LAN;
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};
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};
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reserved-memory {
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q6_mem_regions: q6_mem_regions@4b000000 {
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no-map;
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reg = <0x0 0x4b000000 0x0 0x3000000>;
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status = "disabled";
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};
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};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&xo_board_clk {
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clock-div = <4>;
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clock-mult = <1>;
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};
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&blsp1_uart1 {
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status = "okay";
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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};
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&crypto {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&qfprom {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&qpic_nand {
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pinctrl-0 = <&qpic_pins>;
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pinctrl-names = "default";
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status = "okay";
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nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-ecc-engine = <&qpic_nand>;
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nand-bus-width = <8>;
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partitions {
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compatible = "qcom,smem-part";
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partition-art {
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label = "0:art";
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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hw_mac_addr: mac-address@0 {
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compatible = "mac-base";
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reg = <0x0 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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};
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};
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&switch {
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status = "okay";
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switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
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qcom,port_phyinfo {
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// MAC0 -> GE Phy --- MDI --- QCA8337 Phy4(Port5)
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port@0 {
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port_id = <1>;
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mdiobus = <&mdio0>;
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phy_address = <7>;
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};
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// MAC1 -> Uniphy --- SGMII --- QCA8337 SerDes(Port6)
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port@1 {
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port_id = <2>;
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mdiobus = <&mdio1>;
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forced-speed = <1000>;
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forced-duplex = <1>;
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};
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};
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};
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// MAC0 -> GE Phy
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&dp1 {
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status = "okay";
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nvmem-cells = <&hw_mac_addr 0>;
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nvmem-cell-names = "mac-address";
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};
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// MAC1 -> SGMII
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&dp2 {
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status = "okay";
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nvmem-cells = <&hw_mac_addr 1>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&mdio0 {
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status = "okay";
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};
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// MAC0 -> GE Phy -> QCA8337 Phy4
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&ge_phy {
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qcom,dac-preset-short-cable;
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};
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&mdio1 {
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status = "okay";
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
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// QCA8337 Phy0 -> LAN3
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qca8337_0: ethernet-phy@0 {
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reg = <0>;
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};
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// QCA8337 Phy1 -> LAN2
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qca8337_1: ethernet-phy@1 {
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reg = <1>;
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};
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// QCA8337 Phy2 -> LAN1
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qca8337_2: ethernet-phy@2 {
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reg = <2>;
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};
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// QCA8337 Phy3 -> WAN
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qca8337_3: ethernet-phy@3 {
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reg = <3>;
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};
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// QCA8337 Phy4 -> IPQ5018 GE Phy
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qca8337_4: ethernet-phy@4 {
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reg = <4>;
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};
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// QCA8337 switch
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switch1: ethernet-switch@17 {
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compatible = "qca,qca8337";
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reg = <17>;
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan3";
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phy-handle = <&qca8337_0>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&qca8337_1>;
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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phy-handle = <&qca8337_2>;
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};
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port@4 {
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reg = <4>;
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label = "wan";
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phy-handle = <&qca8337_3>;
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};
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/*
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* WAN cannot work if added
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* port@5 {
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* reg = <5>;
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* phy-handle = <&qca8337_4>;
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* phy-mode = "gmii";
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* ethernet = <&dp1>;
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* };
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*/
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port@6 {
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reg = <6>;
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phy-mode = "sgmii";
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ethernet = <&dp2>;
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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&tlmm {
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button_pins: button-state {
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button-pins {
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pins = "gpio34", "gpio33";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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led_pins: led-state {
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pins = "gpio35", "gpio30";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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mdio1_pins: mdio-state {
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mdc-pins {
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pins = "gpio36";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio37";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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qpic_pins: qpic-state {
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clock-pins {
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pins = "gpio9";
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function = "qspi_clk";
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drive-strength = <8>;
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bias-disable;
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};
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cs-pins {
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pins = "gpio8";
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function = "qspi_cs";
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drive-strength = <8>;
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bias-disable;
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};
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data-pins {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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function = "qspi_data";
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drive-strength = <8>;
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bias-disable;
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};
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};
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serial_0_pins: uart0-state {
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pins = "gpio28", "gpio29";
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function = "blsp0_uart1";
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drive-strength = <8>;
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bias-disable;
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};
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switch_reset_pins: switch-reset-state {
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pins = "gpio26";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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/*
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* ath11k Wi-Fi consumes too large memory spaces and too few spaces are
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* available for users. To prevent OOM when using LuCI or other softwares,
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* disable Wi-Fi related peripherals at the moment.
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*/
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&q6v5_wcss {
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status = "disabled";
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memory-region = <&q6_mem_regions>;
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firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
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"ath11k/IPQ5018/hw1.0/m3_fw.mdt",
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"ath11k/QCN6122/hw1.0/m3_fw.mdt";
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/* The QCN6102 radio should map to UPD ID 2. Without */
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/* bootargs, the firmware will expect it to be on UPD ID 3 */
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boot-args = <0x2 4 2 27 0 0>; /* pcie:2, len:4, updid:2, reset:gpio27 */
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// IPQ5018
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q6_wcss_pd1: pd-1 {
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firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
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resets =
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<&gcc GCC_WCSSAON_RESET>,
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<&gcc GCC_WCSS_BCR>,
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<&gcc GCC_CE_BCR>;
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reset-names =
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"wcss_aon_reset",
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"wcss_reset",
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"ce_reset";
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clocks =
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<&gcc GCC_WCSS_AHB_S_CLK>,
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<&gcc GCC_WCSS_ACMT_CLK>,
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<&gcc GCC_WCSS_AXI_M_CLK>;
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clock-names =
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"gcc_wcss_ahb_s_clk",
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"gcc_wcss_acmt_clk",
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"gcc_wcss_axi_m_clk";
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interrupts-extended =
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<&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
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<&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
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<&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
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<&wcss_smp2p_in 11 IRQ_TYPE_NONE>;
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interrupt-names =
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"fatal",
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"ready",
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"spawn-ack",
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"stop-ack";
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qcom,smem-states =
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<&wcss_smp2p_out 8>,
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<&wcss_smp2p_out 9>,
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<&wcss_smp2p_out 10>;
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qcom,smem-state-names =
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"shutdown",
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"stop",
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"spawn";
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status = "disabled";
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};
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// QCN6102 5G
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q6_wcss_pd2: pd-2 {
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firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
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interrupts-extended =
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<&wcss_smp2p_in 16 IRQ_TYPE_NONE>,
|
||||
<&wcss_smp2p_in 17 IRQ_TYPE_NONE>,
|
||||
<&wcss_smp2p_in 20 IRQ_TYPE_NONE>,
|
||||
<&wcss_smp2p_in 19 IRQ_TYPE_NONE>;
|
||||
interrupt-names =
|
||||
"fatal",
|
||||
"ready",
|
||||
"spawn-ack",
|
||||
"stop-ack";
|
||||
|
||||
qcom,smem-states =
|
||||
<&wcss_smp2p_out 16>,
|
||||
<&wcss_smp2p_out 17>,
|
||||
<&wcss_smp2p_out 18>;
|
||||
qcom,smem-state-names =
|
||||
"shutdown",
|
||||
"stop",
|
||||
"spawn";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
// IPQ5018
|
||||
qcom,rproc = <&q6_wcss_pd1>;
|
||||
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
|
||||
qcom,ath11k-calibration-variant = "CMCC-PZ-L8";
|
||||
qcom,ath11k-fw-memory-mode = <1>;
|
||||
qcom,bdf-addr = <0x4c400000>;
|
||||
|
||||
ieee80211-freq-limit = <2400000 2483000>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wifi1 {
|
||||
// QCN6102 5G
|
||||
qcom,rproc = <&q6_wcss_pd2>;
|
||||
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
|
||||
qcom,ath11k-calibration-variant = "CMCC-PZ-L8";
|
||||
qcom,ath11k-fw-memory-mode = <1>;
|
||||
qcom,bdf-addr = <0x4d100000>;
|
||||
qcom,m3-dump-addr = <0x4df00000>;
|
||||
|
||||
ieee80211-freq-limit = <5150000 5730000>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -18,6 +18,20 @@ define Build/mstc-header
|
|||
rm -f $@.crclen
|
||||
endef
|
||||
|
||||
define Device/cmcc_pz-l8
|
||||
$(call Device/FitImageLzma)
|
||||
$(call Device/UbiFit)
|
||||
DEVICE_VENDOR := CMCC
|
||||
DEVICE_MODEL := PZ-L8
|
||||
DEVICE_DTS_CONFIG := config@mp02.1
|
||||
SOC := ipq5018
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
IMAGE_SIZE := 59392k
|
||||
NAND_SIZE := 128m
|
||||
endef
|
||||
TARGET_DEVICES += cmcc_pz-l8
|
||||
|
||||
define Device/elecom_wrc-x3000gs2
|
||||
$(call Device/FitImageLzma)
|
||||
DEVICE_VENDOR := ELECOM
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ board_config_update
|
|||
board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
cmcc,pz-l8|\
|
||||
elecom,wrc-x3000gs2|\
|
||||
iodata,wn-dax3000gr)
|
||||
ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan" "tx rx link_10 link_100 link_1000"
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ ipq50xx_setup_interfaces()
|
|||
glinet,gl-b3000)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
|
||||
;;
|
||||
cmcc,pz-l8|\
|
||||
linksys,mx2000|\
|
||||
linksys,mx5500|\
|
||||
linksys,spnmx56|\
|
||||
|
|
|
|||
|
|
@ -102,6 +102,7 @@ platform_pre_upgrade() {
|
|||
|
||||
platform_do_upgrade() {
|
||||
case "$(board_name)" in
|
||||
cmcc,pz-l8|\
|
||||
elecom,wrc-x3000gs2|\
|
||||
iodata,wn-dax3000gr)
|
||||
local delay
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue