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siflower: 6.12: refresh patches

Browse source 
This involves rebasing the patches and resolving any conflicts
arising from changes in the base kernel between the previous
supported version and 6.12.

Tested-by: Jingkun Zheng <mx@kevinmx.top>
Tested-by: Zhu Yujie <libriunc@gmail.com>
Tested-by: Chuanhong Guo gch981213@gmail.com
Signed-off-by: Zhu Yujie <libriunc@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20555
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Zhu Yujie 2025-11-14 15:15:44 +08:00 • committed by Christian Marangi
parent 11565a298e
commit 5866f9b024
No known key found for this signature in database
GPG key ID: AC001D09ADBFEAD7
16 changed files with 56 additions and 54 deletions
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4
target/linux/siflower/patches-6.12/004-mips-add-support-for-Siflower-SF19A2890.patch
View file

@ -10,15 +10,15 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -861,6 +861,35 @@ config SIBYTE_BIGSUR
@@ -893,6 +893,35 @@ config SIBYTE_BIGSUR
select ZONE_DMA32 if 64BIT
select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
+config MACH_SIFLOWER_MIPS
+ bool "Siflower MIPS SoCs"
+ select MIPS_GENERIC
+ select MACH_GENERIC_CORE
+ select ARM_AMBA
+ select BOOT_RAW
+ select CEVT_R4K
+ select CLKSRC_MIPS_GIC
+ select COMMON_CLK

8
target/linux/siflower/patches-6.12/005-clk-add-drivers-for-siflower-socs.patch
View file

@ -10,21 +10,21 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -489,6 +489,7 @@ source "drivers/clk/renesas/Kconfig"
@@ -496,6 +496,7 @@ source "drivers/clk/renesas/Kconfig"
source "drivers/clk/rockchip/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sifive/Kconfig"
+source "drivers/clk/siflower/Kconfig"
source "drivers/clk/socfpga/Kconfig"
source "drivers/clk/sophgo/Kconfig"
source "drivers/clk/sprd/Kconfig"
source "drivers/clk/starfive/Kconfig"
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -116,6 +116,7 @@ obj-y += renesas/
@@ -127,6 +127,7 @@ obj-y += renesas/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
+obj-$(CONFIG_CLK_SIFLOWER) += siflower/
obj-y += socfpga/
obj-y += sophgo/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-y += sprd/

6
target/linux/siflower/patches-6.12/006-reset-add-support-for-sf19a2890.patch
View file

@ -10,7 +10,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -211,6 +211,14 @@ config RESET_SCMI
@@ -242,6 +242,14 @@ config RESET_SCMI
This driver uses SCMI Message Protocol to interact with the
firmware controlling all the reset signals.
@ -24,10 +24,10 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_RESET_QCOM_PDC) += reset-qc
@@ -32,6 +32,7 @@ obj-$(CONFIG_RESET_QCOM_PDC) += reset-qc
obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
obj-$(CONFIG_RESET_SCMI) += reset-scmi.o

4
target/linux/siflower/patches-6.12/007-gpio-add-support-for-siflower-socs.patch
View file

@ -15,7 +15,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -576,6 +576,14 @@ config GPIO_SIFIVE
@@ -635,6 +635,14 @@ config GPIO_SIFIVE
help
Say yes here to support the GPIO device on SiFive SoCs.
@ -32,7 +32,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
depends on SIOX
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -143,6 +143,7 @@ obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio
@@ -149,6 +149,7 @@ obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio
obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o

10
target/linux/siflower/patches-6.12/008-pinctrl-add-driver-for-siflower-sf19a2890.patch
View file

@ -9,9 +9,9 @@ Subject: [PATCH 08/20] pinctrl: add driver for siflower sf19a2890
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -417,6 +417,16 @@ config PINCTRL_ROCKCHIP
help
This support pinctrl and GPIO driver for Rockchip SoCs.
@@ -483,6 +483,16 @@ config PINCTRL_SCMI
It uses SCMI Message Protocol to interact with the
firmware providing all the pinctrl controls.
+config PINCTRL_SF19A2890
+ tristate "Siflower SF19A2890 pinctrl driver"
@ -28,10 +28,10 @@ Subject: [PATCH 08/20] pinctrl: add driver for siflower sf19a2890
depends on OF
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-p
obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_PISTACHIO) += pinct
obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
obj-$(CONFIG_PINCTRL_SCMI) += pinctrl-scmi.o
+obj-$(CONFIG_PINCTRL_SF19A2890) += pinctrl-sf19a2890.o
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o

8
target/linux/siflower/patches-6.12/009-stmmac-add-support-for-sf19a2890.patch
View file

@ -9,9 +9,9 @@ Subject: [PATCH 09/20] stmmac: add support for sf19a2890
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -142,6 +142,15 @@ config DWMAC_ROCKCHIP
This selects the Rockchip RK3288 SoC glue layer support for
the stmmac device driver.
@@ -154,6 +154,15 @@ config DWMAC_RZN1
the stmmac device driver. This support can make use of a custom MII
converter PCS device.
+config DWMAC_SF19A2890
+ tristate "Siflower SF19A2890 GMAC support"
@ -32,6 +32,6 @@ Subject: [PATCH 09/20] stmmac: add support for sf19a2890
obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o
obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
+obj-$(CONFIG_DWMAC_SF19A2890) += dwmac-sf19a2890.o
obj-$(CONFIG_DWMAC_RZN1) += dwmac-rzn1.o
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STARFIVE) += dwmac-starfive.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o

4
target/linux/siflower/patches-6.12/010-phy-add-support-for-Siflower-USB-PHYs.patch
View file

@ -10,7 +10,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -90,6 +90,7 @@ source "drivers/phy/ralink/Kconfig"
@@ -102,6 +102,7 @@ source "drivers/phy/realtek/Kconfig"
source "drivers/phy/renesas/Kconfig"
source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/samsung/Kconfig"
@ -20,7 +20,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
source "drivers/phy/starfive/Kconfig"
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -29,6 +29,7 @@ obj-y += allwinner/ \
@@ -32,6 +32,7 @@ obj-y += allwinner/ \
renesas/ \
rockchip/ \
samsung/ \

10
target/linux/siflower/patches-6.12/011-usb-dwc2-add-support-for-Siflower-SF19A2890.patch
View file

@ -9,8 +9,8 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -200,6 +200,14 @@ static void dwc2_set_amcc_params(struct
p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
@@ -237,6 +237,14 @@ static void dwc2_set_cv1800_params(struc
p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
}
+static void dwc2_set_sf19a2890_params(struct dwc2_hsotg *hsotg)
@ -24,10 +24,10 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
{
struct dwc2_core_params *p = &hsotg->params;
@@ -294,6 +302,8 @@ const struct of_device_id dwc2_of_match_
.data = dwc2_set_amlogic_a1_params },
{ .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
@@ -336,6 +344,8 @@ const struct of_device_id dwc2_of_match_
{ .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
{ .compatible = "sophgo,cv1800-usb",
.data = dwc2_set_cv1800_params },
+ { .compatible = "siflower,sf19a2890-usb",
+ .data = dwc2_set_sf19a2890_params },
{ .compatible = "st,stm32f4x9-fsotg",

8
target/linux/siflower/patches-6.12/012-usb-dwc2-handle-OTG-interrupt-regardless-of-GINTSTS.patch
View file

@ -27,7 +27,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
{
u32 gotgint;
u32 gotgctl;
@@ -87,6 +87,10 @@ static void dwc2_handle_otg_intr(struct
@@ -88,6 +88,10 @@ static void dwc2_handle_otg_intr(struct
gotgint = dwc2_readl(hsotg, GOTGINT);
gotgctl = dwc2_readl(hsotg, GOTGCTL);
@ -38,7 +38,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
dwc2_op_state_str(hsotg));
@@ -229,6 +233,7 @@ static void dwc2_handle_otg_intr(struct
@@ -244,6 +248,7 @@ static void dwc2_handle_otg_intr(struct
/* Clear GOTGINT */
dwc2_writel(hsotg, gotgint, GOTGINT);
@ -46,7 +46,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
}
/**
@@ -842,6 +847,8 @@ irqreturn_t dwc2_handle_common_intr(int
@@ -862,6 +867,8 @@ irqreturn_t dwc2_handle_common_intr(int
hsotg->frame_number = (dwc2_readl(hsotg, HFNUM)
& HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT;
@ -55,7 +55,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
gintsts = dwc2_read_common_intr(hsotg);
if (gintsts & ~GINTSTS_PRTINT)
retval = IRQ_HANDLED;
@@ -855,8 +862,6 @@ irqreturn_t dwc2_handle_common_intr(int
@@ -875,8 +882,6 @@ irqreturn_t dwc2_handle_common_intr(int
if (gintsts & GINTSTS_MODEMIS)
dwc2_handle_mode_mismatch_intr(hsotg);

4
target/linux/siflower/patches-6.12/013-riscv-add-Siflower-RISC-V-SoC-family-Kconfig-support.patch
View file

@ -16,9 +16,9 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -22,6 +22,12 @@ config SOC_SIFIVE
@@ -24,6 +24,12 @@ config ARCH_SOPHGO
help
This enables support for SiFive SoC platform hardware.
This enables support for Sophgo SoC platform hardware.
+config ARCH_SIFLOWER
+ bool "Siflower RISC-V SoCs"

6
target/linux/siflower/patches-6.12/015-reset-add-support-for-sf21a6826-sf21h8898.patch
View file

@ -9,7 +9,7 @@ Subject: [PATCH 15/20] reset: add support for sf21a6826/sf21h8898
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -219,6 +219,11 @@ config RESET_SF19A2890_PERIPH
@@ -250,6 +250,11 @@ config RESET_SF19A2890_PERIPH
This enables reset controller driver for peripheral reset blocks
found on Siflower SF19A2890 SoC.
@ -20,10 +20,10 @@ Subject: [PATCH 15/20] reset: add support for sf21a6826/sf21h8898
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset
@@ -33,6 +33,7 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset
obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
obj-$(CONFIG_RESET_SF19A2890_PERIPH) += reset-sf19a2890-periph.o

4
target/linux/siflower/patches-6.12/016-spi-spi-mem-allow-gpio-cs-in-spi_mem_exec_op.patch
View file

@ -18,9 +18,9 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -325,13 +325,19 @@ int spi_mem_exec_op(struct spi_mem *mem,
@@ -368,13 +368,19 @@ int spi_mem_exec_op(struct spi_mem *mem,
if (!spi_mem_internal_supports_op(mem, op))
return -ENOTSUPP;
return -EOPNOTSUPP;
- if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) {
+ if (ctlr->mem_ops && ctlr->mem_ops->exec_op) {

4
target/linux/siflower/patches-6.12/017-spi-add-support-for-sf21-qspi.patch
View file

@ -20,7 +20,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -949,6 +949,13 @@ config SPI_SIFIVE
@@ -977,6 +977,13 @@ config SPI_SIFIVE
help
This exposes the SPI controller IP from SiFive.
@ -36,7 +36,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
depends on ARCH_MEDIATEK || COMPILE_TEST
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -126,6 +126,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hsp
@@ -130,6 +130,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hsp
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o

4
target/linux/siflower/patches-6.12/018-pci-dw-pcie-add-support-for-sf21-pcie.patch
View file

@ -13,7 +13,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -317,6 +317,15 @@ config PCIE_FU740
@@ -361,6 +361,15 @@ config PCIE_FU740
Say Y here if you want PCIe controller support for the SiFive
FU740.
@ -31,7 +31,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
depends on ARCH_UNIPHIER || COMPILE_TEST
--- a/drivers/pci/controller/dwc/Makefile
+++ b/drivers/pci/controller/dwc/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_PCIE_KEEMBAY) += pcie-keemb
@@ -23,6 +23,7 @@ obj-$(CONFIG_PCIE_KEEMBAY) += pcie-keemb
obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
obj-$(CONFIG_PCI_MESON) += pci-meson.o

21
target/linux/siflower/patches-6.12/019-net-phy-add-support-for-Siflower-SF23P1211-SF23P1240.patch
View file

@ -1,7 +1,6 @@
From: "haoming.chen" <haoming.chen@siflower.com.cn>
Date: Thu, 7 Nov 2024 20:18:59 +0800
Subject: [PATCH 19/20] net: phy: add support for Siflower SF23P1211 &
SF23P1240
Subject: [PATCH 19/20] net: phy: add support for Siflower SF23P1211 & SF23P1240
Signed-off-by: haoming.chen <haoming.chen@siflower.com.cn>
---
@ -11,20 +10,22 @@ Signed-off-by: haoming.chen <haoming.chen@siflower.com.cn>
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -481,3 +481,8 @@ endif # PHYLIB
config MICREL_KS8995MA
tristate "Micrel KS8995MA 5-ports 10/100 managed Ethernet switch"
depends on SPI
+
@@ -443,6 +443,11 @@ config ROCKCHIP_PHY
help
Currently supports the integrated Ethernet PHY.
+config SIFLOWER_PHY
+ tristate "Siflower PHYs"
+ help
+ Currently supports the SF1211F, SF1240 gigabit PHY.
+ Currently supports the SF23P1211 and SF23P1240 gigabit PHYs.
+
config SMSC_PHY
tristate "SMSC PHYs"
select CRC16
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -108,3 +108,4 @@ obj-$(CONFIG_STE10XP) += ste10Xp.o
@@ -118,3 +118,4 @@ obj-$(CONFIG_STE10XP) += ste10Xp.o
obj-$(CONFIG_TERANETICS_PHY) += teranetics.o
obj-$(CONFIG_VITESSE_PHY) += vitesse.o
obj-$(CONFIG_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o
+obj-$(CONFIG_SIFLOWER_PHY) += siflower.o
\ No newline at end of file

5
target/linux/siflower/patches-6.12/020-net-ethernet-add-support-for-Siflower-DPNS.patch
View file

@ -11,7 +11,7 @@ Signed-off-by: haoming.chen <haoming.chen@siflower.com.cn>
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -192,5 +192,6 @@ source "drivers/net/ethernet/wangxun/Kco
@@ -201,5 +201,6 @@ source "drivers/net/ethernet/wangxun/Kco
source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
@ -20,8 +20,9 @@ Signed-off-by: haoming.chen <haoming.chen@siflower.com.cn>
endif # ETHERNET
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -104,3 +104,4 @@ obj-$(CONFIG_NET_VENDOR_XILINX) += xilin
@@ -105,4 +105,5 @@ obj-$(CONFIG_NET_VENDOR_XILINX) += xilin
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
obj-$(CONFIG_NET_VENDOR_SYNOPSYS) += synopsys/
obj-$(CONFIG_NET_VENDOR_PENSANDO) += pensando/
+obj-$(CONFIG_NET_VENDOR_SIFLOWER) += siflower/
obj-$(CONFIG_OA_TC6) += oa_tc6.o