qualcommax: ipq50xx: backport v6.20 patches

Replace the following pending patches which have now been merged in
kernel v6.20:
- arm64: dts: qcom: ipq5018: Remove tsens v1 fallback compatible
- clk: qcom: gcc-ipq5018: flag sleep clock as critical
- arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21883
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
George Moussalem 2026-02-05 21:31:38 +04:00 committed by Robert Marko
parent 01fb4a6daa
commit 483d2f1756
7 changed files with 109 additions and 233 deletions

View file

@ -0,0 +1,30 @@
From 60fb18fbc234efb2d59472a889282dba2df3402a Mon Sep 17 00:00:00 2001
From: George Moussalem <george.moussalem@outlook.com>
Date: Mon, 18 Aug 2025 15:33:47 +0400
Subject: arm64: dts: qcom: ipq5018: Remove tsens v1 fallback compatible
Remove qcom,tsens-v1 as fallback compatible since this IP has no RPM
and, as such, must use its own init routine available in the driver.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250818-ipq5018-tsens-fix-v1-2-0f08cf09182d@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'arch/arm64/boot/dts/qcom/ipq5018.dtsi')
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -340,7 +340,7 @@
};
tsens: thermal-sensor@4a9000 {
- compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1";
+ compatible = "qcom,ipq5018-tsens";
reg = <0x004a9000 0x1000>,
<0x004a8000 0x1000>;

View file

@ -0,0 +1,29 @@
From 04c4dc1f541135708d90a9b4632af51136f93ac3 Mon Sep 17 00:00:00 2001
From: George Moussalem <george.moussalem@outlook.com>
Date: Fri, 28 Nov 2025 15:03:19 +0400
Subject: clk: qcom: gcc-ipq5018: flag sleep clock as critical
The sleep clock never be disabled. To avoid the kernel trying to disable
it and keep it always on, flag it as critical.
Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251128-ipq5018-sleep-clk-fix-v1-1-6f4b75ec336c@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---
drivers/clk/qcom/gcc-ipq5018.c | 1 +
1 file changed, 1 insertion(+)
(limited to 'drivers/clk/qcom/gcc-ipq5018.c')
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -1340,6 +1340,7 @@ static struct clk_branch gcc_sleep_clk_s
.name = "gcc_sleep_clk_src",
.parent_data = gcc_sleep_clk_data,
.num_parents = ARRAY_SIZE(gcc_sleep_clk_data),
+ .flags = CLK_IS_CRITICAL,
.ops = &clk_branch2_ops,
},
},

View file

@ -0,0 +1,48 @@
From d106f9681d1952b7c19726b0713cee6ae11211f5 Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Date: Tue, 6 Jan 2026 19:51:24 +0100
Subject: arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts
Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is
not listed in reference manual at all. It was also causing dtbs_check
warnings:
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short
Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb:
dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring
sanity to the interrupts overall, although did a mistake for IPQ5018.
IPQ5018 does not have QUSB2 PHY and its interrupts should rather match
ones used in IPQ5332.
Correct it by using interrupts matching the bindings and reference
manual.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tested-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20260106185123.19929-3-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
(limited to 'arch/arm64/boot/dts/qcom/ipq5018.dtsi')
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -571,8 +571,12 @@
compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq";
+ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB0_AXI_CLK>,

View file

@ -1,109 +0,0 @@
From patchwork Mon Aug 18 11:33:47 2025
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: George Moussalem <george.moussalem@outlook.com>
X-Patchwork-Id: 14192807
Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org
[10.30.226.201])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEFC62E22A9;
Mon, 18 Aug 2025 11:33:51 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=10.30.226.201
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1755516831; cv=none;
b=VqLETc4T2um7UBDoagDhE5FaVjJLNoLCW45q/LUrwXoemwWqIFZm7XVzEyPjuUDYlgOw9BuQEdRd7nWhXOVdv1pxkbIOt4gS7MPPVGBilyaXc/sWLyd8qk0KNcIXV1rGmEZ7Ywn0BdnngdNfSAQvSACHhpyMZpGXRodCNPE5cls=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1755516831; c=relaxed/simple;
bh=ZZKBTpL6UHyciqnKATbtrkmYynWeMCWrFd/2xcp++ww=;
h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:
In-Reply-To:To:Cc;
b=XU6nlgSFgahhOxRhNcFU7wdAqhbLs8Ra7XxTipYaqKQqtp7v39J0ju+HaZOu9YE8a+aN4qG3R/YMTtCxZWejrgk6wU7nT/KBLqhjd1G2f0bWq/4NipYk+S7xYZyfe2lpNpZ2SRUI/1h6BFPoUnMzTeeuH8VjX/qIM3oLVe2s968=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org
header.b=PKBRtdr/; arc=none smtp.client-ip=10.30.226.201
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org
header.b="PKBRtdr/"
Received: by smtp.kernel.org (Postfix) with ESMTPS id 7CDF3C4CEED;
Mon, 18 Aug 2025 11:33:51 +0000 (UTC)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;
s=k20201202; t=1755516831;
bh=ZZKBTpL6UHyciqnKATbtrkmYynWeMCWrFd/2xcp++ww=;
h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;
b=PKBRtdr/YTJTrl92zpHzzAovfqaynlZxJFZ667MTjd+V2zpPVbh/Qw2YkWFGl8Zeg
JIv0gaRa7PdagA1GA06EbVEy4GO0sNTdf6FR9uMTB8QJLoShXHrFGEgBkV0GrW6GR2
l8QjDRsmfKbIfV7udOOmrqR83UfsKpyVH4F39JlEvteIsWQni/6UESQxGlGkBryduS
E2cVKO6sKNLJP6QVQf3TJeZsf5Xb+y/3xsqurGnhx7LD7r26jt0UaWQouihdlLn4lj
AEw/X1Kg1G29aq65wiw0DT5mBXOiR0gDatBMXU/FSddyoCFlqbrMLijDrt/R6gGmcS
tgOzuwrEZQhrA==
Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org
(localhost.localdomain [127.0.0.1])
by smtp.lore.kernel.org (Postfix) with ESMTP id 6E9D7CA0EE4;
Mon, 18 Aug 2025 11:33:51 +0000 (UTC)
Date: Mon, 18 Aug 2025 15:33:47 +0400
Subject: [PATCH 2/2] arm64: dts: qcom: ipq5018: Remove tsens v1 fallback
compatible
Precedence: bulk
X-Mailing-List: linux-arm-msm@vger.kernel.org
List-Id: <linux-arm-msm.vger.kernel.org>
List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Message-Id: <20250818-ipq5018-tsens-fix-v1-2-0f08cf09182d@outlook.com>
References: <20250818-ipq5018-tsens-fix-v1-0-0f08cf09182d@outlook.com>
In-Reply-To: <20250818-ipq5018-tsens-fix-v1-0-0f08cf09182d@outlook.com>
To: Amit Kucheria <amitk@kernel.org>,
Thara Gopinath <thara.gopinath@gmail.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>, Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sricharan Ramabadhran <quic_srichara@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
George Moussalem <george.moussalem@outlook.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
X-Mailer: b4 0.14.2
X-Developer-Signature: v=1; a=ed25519-sha256; t=1755516829; l=972;
i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id;
bh=HJcOgtw7oiilIyh0aWOOzNZ2iln5P6lSb3GMC6Gave0=;
b=uR1EVwZAX79JKZzxxM9N7TA/hO1CtlDORhZ/FGhSsA68dLhwH953wdmIPFDj4vfeWpsTsB3Bh
4W66WWUho9RBMALQ66he3JtRH90AzRDuzcypOj7GRnzE6ehzDO8Gl3R
X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519;
pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk=
X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321
with auth_id=364
X-Original-From: George Moussalem <george.moussalem@outlook.com>
Reply-To: george.moussalem@outlook.com
From: George Moussalem <george.moussalem@outlook.com>
From: George Moussalem <george.moussalem@outlook.com>
Remove qcom,tsens-v1 as fallback compatible since this IP has no RPM
and, as such, must use its own init routine available in the driver.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -340,7 +340,7 @@
};
tsens: thermal-sensor@4a9000 {
- compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1";
+ compatible = "qcom,ipq5018-tsens";
reg = <0x004a9000 0x1000>,
<0x004a8000 0x1000>;

View file

@ -1,19 +0,0 @@
From: George Moussalem <george.moussalem@outlook.com>
Date: Tue, 21 Oct 2025 15:15:23 +0400
Subject: [PATCH] clk: qcom: gcc-ipq5018: flag sleep clock as critical
The sleep clock never be disabled. To avoid the kernel trying to disable
it and keep it always on, flag it as critical.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -1340,6 +1340,7 @@ static struct clk_branch gcc_sleep_clk_s
.name = "gcc_sleep_clk_src",
.parent_data = gcc_sleep_clk_data,
.num_parents = ARRAY_SIZE(gcc_sleep_clk_data),
+ .flags = CLK_IS_CRITICAL,
.ops = &clk_branch2_ops,
},
},

View file

@ -28,7 +28,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
};
soc: soc@0 {
@@ -717,6 +722,41 @@
@@ -721,6 +726,41 @@
};
};
@ -70,7 +70,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
pcie1: pcie@80000000 {
compatible = "qcom,pcie-ipq5018";
reg = <0x80000000 0xf1d>,
@@ -991,4 +1031,28 @@
@@ -995,4 +1035,28 @@
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};

View file

@ -1,103 +0,0 @@
From: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [RFT PATCH 1/2] arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper
interrupts
Date: Tue, 6 Jan 2026 19:51:24 +0100
Message-ID: <20260106185123.19929-3-krzysztof.kozlowski@oss.qualcomm.com>
X-Mailer: git-send-email 2.51.0
Precedence: bulk
X-Mailing-List: linux-arm-msm@vger.kernel.org
List-Id: <linux-arm-msm.vger.kernel.org>
List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
X-Developer-Signature: v=1; a=openpgp-sha256; l=1855;
i=krzysztof.kozlowski@oss.qualcomm.com;
h=from:subject; bh=Xuo83gqJRGnpPAOs6iQzERsKv6wSsG/YRYnYXPqa/Sg=;
b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBpXVmsP2NQodDkckFfKenEt59tQ2tP8tDhpIVRp
RZ7+KF/hJmJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaV1ZrAAKCRDBN2bmhouD
1+5QEACJ2Y4HPEMWYNgLDF6qOtlvm/KD0Jr4Ucwt4ZWau3y1XLDxmlTX/3iErYwirq+3qbqwkAQ
0a2ah57InLXR8ZNccHZs+WIaLgD5r8Q6rAwzJZ36hqG1F4GP8+Z7X9irzMoNCvoM0TwI8rBRvfo
3Vt7nRS+0rUfDSED4SrfqaISrf0UY/qmx+fM1uI0DcVNio5Q4eRx9g2i7lz9eP/Z3pVKxds+Vwr
9lgSPsPjvmGTKpAOTGYm1YTQ6INTFjYCyVJHqN2OIQB+A5JDgDAuvny0AFJYNl245JkGCzWAqJ9
QJLhwXaYHW2x7SjMrb23u05sqZDZ4zBPcwL19BK4YnHvqr9wpeVHbfp3kt3CG3WBQLtRofy7XFN
E7/U4xjLMrgY7OIWB7x5jKCkGOvvuvDt1Fjj1QcTIlqRRRJixA9LOi2lPI3LimfmB0WdkRe/t0L
yY6AaMXBPLF8sBB4IRVRqgd2fH9levrKGNSIq/2eLKfzo534rP+xeq2vkcYjxvKWxRQTl4WIcoW
n7AMCwVcvlo7BSNmG08tUWy0dh3q05G6UTbOCI3k5yA2HXUuDvCqwQrjjqoiK3AJJJzmofdo4Ia
uMKgpt4F8WhXpm3ZIbhUTXPVkUIlCw0J5i17RY8874CE7RDkD2D7x2o8rDvTKYF4mgtZJdDvwEA
fsTV1kd7IuAITAw==
X-Developer-Key: i=krzysztof.kozlowski@oss.qualcomm.com; a=openpgp;
fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B
X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA2MDE2MyBTYWx0ZWRfX3U5gQ09Eg4P5
J+JTXpD+8wsrl6S+zqont1G2wbGC0taXnQymgx0Mca7cBzRBLFhiLv38Vm4+5EIgjyQYZDjjeRP
/DJtM8Zfyayy8WGYlNnzBf244C4ZMQe0dpdE9M5NdDcuT84qJ1UzQNoKMu4L/c//Z2M138Z7EOa
dsChxclJ1draFJ4GkKiGeVI/aKGjvWkGTWCUHyzGNDuTAgUsb03BOUqvi8siW2nSOcQsVsAFmvH
keTOGsrziZDYvBVyKBCxOErzILrtBmqImp/Csijw9koYz25bgToQ1q0w9o/fZk32ObzcsHqMB9p
mt1r2EcJkarxlXwkTHRIl8vAjlt606HkmIxFbAWkcg1vGIgJuAb52FwROPsy47PWjtx7YD/isIP
zStXHg08BYnrAVmziHIJBzS8/PFBW4nUyHWAjcAy3Pjm5HHXoWAquM6fBrYPsN9zbeK5xBT8g/h
+GKEmVx+WHxL0zw4VzA==
X-Authority-Analysis: v=2.4 cv=YqIChoYX c=1 sm=1 tr=0 ts=695d59b1 cx=c_pps
a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=Eb9f15NH/cHKzfGOmZSO4Q==:17
a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22
a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=L4kx1223G2YaxeqoHsIA:9
a=a_PwQJl-kcHnX1M80qC6:22
X-Proofpoint-GUID: UmSF8BMpS-2X6JM4bvdJU0HFOuucl8G2
X-Proofpoint-ORIG-GUID: UmSF8BMpS-2X6JM4bvdJU0HFOuucl8G2
X-Proofpoint-Virus-Version: vendor=baseguard
engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49
definitions=2026-01-06_01,2026-01-06_01,2025-10-01_01
X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0
priorityscore=1501 suspectscore=0 impostorscore=0 bulkscore=0 malwarescore=0
phishscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0
classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0
reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601060163
Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is
not listed in reference manual at all. It was also causing dtbs_check
warnings:
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short
Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb:
dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring
sanity to the interrupts overall, although did a mistake for IPQ5018.
IPQ5018 does not have QUSB2 PHY and its interrupts should rather match
ones used in IPQ5332.
Correct it by using interrupts matching the bindings and reference
manual.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
Not tested on hardware.
Bindings for this change:
lore.kernel.org/r/20260106185012.19551-3-krzysztof.kozlowski@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -576,8 +576,12 @@
compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq";
+ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB0_AXI_CLK>,