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boot: airoha: apply network driver fixes
This series improve network reliability. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Link: https://github.com/openwrt/openwrt/pull/20295 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Mikhail Kshevetskiy
Robert Marko
parent
e06725222e
commit
1949fb996a
6 changed files with 380 additions and 133 deletions
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@ -0,0 +1,32 @@
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From a11420dac873fbd5b8a81192571d914f01bee26d Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Wed, 9 Jul 2025 12:28:07 +0300
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Subject: [PATCH 1/5] drivers/net/airoha_eth: add missing terminator for
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compatible devices list
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Compatible device list must have a terminator. If terminator is missed
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the u-boot driver subsystem will access random data placed after the
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list in the memory.
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The issue can be observed with the "dm compat" command.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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---
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drivers/net/airoha_eth.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/net/airoha_eth.c b/drivers/net/airoha_eth.c
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index b3fd1ab9064..db34ec48c81 100644
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--- a/drivers/net/airoha_eth.c
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+++ b/drivers/net/airoha_eth.c
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@@ -1052,6 +1052,7 @@ static const struct udevice_id airoha_eth_ids[] = {
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{ .compatible = "airoha,an7583-eth",
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.data = (ulong)&an7583_data,
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},
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+ { }
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};
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static const struct eth_ops airoha_eth_ops = {
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--
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2.51.0
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@ -1,133 +0,0 @@
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From 0343b5c2a754ca20f5155a8f3c6d58e887b9dd4f Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 20 May 2025 16:32:31 +0200
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Subject: [PATCH] net: airoha: Fix spurious Airoha Ethernet stall
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It was reported that sometimes the Airoha Ethernet driver stall and a
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reset is needed to actually receive packet.
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This seems to be related in the logic with how the CPU and DMA counter
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are handled for the RX path. The problem seems to be more evident when
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multiple device are connected to the Ethernet port.
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To handle this, drop local tracking of the current CPU/DMA counter and
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base everything on the current register by reading them and using the
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descriptor directly.
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Fixes: ee0f4afa982e ("net: airoha: Add Airoha Ethernet driver")
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/net/airoha_eth.c | 32 +++++++++++++++++---------------
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1 file changed, 17 insertions(+), 15 deletions(-)
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--- a/drivers/net/airoha_eth.c
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+++ b/drivers/net/airoha_eth.c
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@@ -286,7 +286,6 @@ struct airoha_qdma_fwd_desc {
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struct airoha_queue {
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struct airoha_qdma_desc *desc;
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- u16 head;
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int ndesc;
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};
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@@ -452,7 +451,6 @@ static int airoha_qdma_init_rx_queue(str
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unsigned long dma_addr;
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q->ndesc = ndesc;
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- q->head = 0;
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q->desc = dma_alloc_coherent(q->ndesc * sizeof(*q->desc), &dma_addr);
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if (!q->desc)
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@@ -471,7 +469,7 @@ static int airoha_qdma_init_rx_queue(str
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airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid), RX_RING_CPU_IDX_MASK,
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FIELD_PREP(RX_RING_CPU_IDX_MASK, q->ndesc - 1));
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airoha_qdma_rmw(qdma, REG_RX_DMA_IDX(qid), RX_RING_DMA_IDX_MASK,
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- FIELD_PREP(RX_RING_DMA_IDX_MASK, q->head));
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+ FIELD_PREP(RX_RING_DMA_IDX_MASK, 0));
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return 0;
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}
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@@ -499,7 +497,6 @@ static int airoha_qdma_init_tx_queue(str
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unsigned long dma_addr;
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q->ndesc = size;
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- q->head = 0;
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q->desc = dma_alloc_coherent(q->ndesc * sizeof(*q->desc), &dma_addr);
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if (!q->desc)
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@@ -510,9 +507,9 @@ static int airoha_qdma_init_tx_queue(str
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airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);
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airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,
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- FIELD_PREP(TX_RING_CPU_IDX_MASK, q->head));
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+ FIELD_PREP(TX_RING_CPU_IDX_MASK, 0));
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airoha_qdma_rmw(qdma, REG_TX_DMA_IDX(qid), TX_RING_DMA_IDX_MASK,
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- FIELD_PREP(TX_RING_DMA_IDX_MASK, q->head));
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+ FIELD_PREP(TX_RING_DMA_IDX_MASK, 0));
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return 0;
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}
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@@ -898,8 +895,10 @@ static int airoha_eth_send(struct udevic
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qid = 0;
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q = &qdma->q_tx[qid];
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- desc = &q->desc[q->head];
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- index = (q->head + 1) % q->ndesc;
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+
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+ index = airoha_qdma_rr(qdma, REG_TX_CPU_IDX(qid));
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+ desc = &q->desc[index];
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+ index = (index + 1) % q->ndesc;
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fport = 1;
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@@ -934,7 +933,6 @@ static int airoha_eth_send(struct udevic
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if (!(desc->ctrl & QDMA_DESC_DONE_MASK))
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return -EAGAIN;
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- q->head = index;
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airoha_qdma_rmw(qdma, REG_IRQ_CLEAR_LEN(0),
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IRQ_CLEAR_LEN_MASK, 1);
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@@ -947,12 +945,15 @@ static int airoha_eth_recv(struct udevic
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struct airoha_qdma *qdma = ð->qdma[0];
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struct airoha_qdma_desc *desc;
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struct airoha_queue *q;
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+ int qid, index;
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u16 length;
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- int qid;
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qid = 0;
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q = &qdma->q_rx[qid];
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- desc = &q->desc[q->head];
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+
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+ index = airoha_qdma_rr(qdma, REG_RX_CPU_IDX(qid));
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+ index = (index + 1) % q->ndesc;
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+ desc = &q->desc[index];
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dma_unmap_single(virt_to_phys(desc), sizeof(*desc),
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DMA_FROM_DEVICE);
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@@ -974,7 +975,7 @@ static int arht_eth_free_pkt(struct udev
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struct airoha_eth *eth = dev_get_priv(dev);
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struct airoha_qdma *qdma = ð->qdma[0];
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struct airoha_queue *q;
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- int qid;
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+ int qid, index;
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if (!packet)
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return 0;
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@@ -984,11 +985,12 @@ static int arht_eth_free_pkt(struct udev
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dma_map_single(packet, length, DMA_TO_DEVICE);
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- airoha_qdma_reset_rx_desc(q, q->head, packet);
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+ index = airoha_qdma_rr(qdma, REG_RX_DMA_IDX(qid));
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+ airoha_qdma_reset_rx_desc(q, index, packet);
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+ index = (index + 1) % q->ndesc;
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airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid), RX_RING_CPU_IDX_MASK,
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- FIELD_PREP(RX_RING_CPU_IDX_MASK, q->head));
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- q->head = (q->head + 1) % q->ndesc;
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+ FIELD_PREP(RX_RING_CPU_IDX_MASK, index));
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return 0;
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}
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@ -0,0 +1,107 @@
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From 8fce1cfe775e1f3b5d7cecb8bdcc8271bf9f799c Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Wed, 9 Jul 2025 12:28:08 +0300
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Subject: [PATCH 2/5] drivers/net/airoha_eth: fix packet transmission errors
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The dma_map_single() function calls one of the functions
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* invalidate_dcache_range(),
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* flush_dcache_range().
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Both of them expect that 'vaddr' is aligned to the ARCH_DMA_MINALIGN
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boundary. Unfortunately, RX/TX descriptors are 32-byte long. Thus they
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might not be aligned to the ARCH_DMA_MINALIGN boundary. Data flushing
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(or invalidating) might do nothing in this case.
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The same applies to dma_unmap_single() function.
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In the TX path case the issue might prevent package transmission (filled
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TX descriptor was not flushed).
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To fix an issue a special wrappers for
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* dma_map_single(),
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* dma_unmap_single()
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functions were created. The patch fix flushing/invalidatiog for the
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RX path as well.
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The bug appears on 32-bit airoha platform, but should be present on
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64-bit as well.
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The code was tested both on 32-bit and 64-bit airoha boards.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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---
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drivers/net/airoha_eth.c | 33 +++++++++++++++++++++++++++------
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1 file changed, 27 insertions(+), 6 deletions(-)
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diff --git a/drivers/net/airoha_eth.c b/drivers/net/airoha_eth.c
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index db34ec48c81..aae6922f3c7 100644
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--- a/drivers/net/airoha_eth.c
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+++ b/drivers/net/airoha_eth.c
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@@ -397,6 +397,27 @@ static u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)
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#define airoha_switch_rmw(eth, offset, mask, val) \
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airoha_rmw((eth)->switch_regs, (offset), (mask), (val))
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+static inline dma_addr_t dma_map_unaligned(void *vaddr, size_t len,
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+ enum dma_data_direction dir)
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+{
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+ uintptr_t start, end;
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+
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+ start = ALIGN_DOWN((uintptr_t)vaddr, ARCH_DMA_MINALIGN);
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+ end = ALIGN((uintptr_t)(vaddr + len), ARCH_DMA_MINALIGN);
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+
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+ return dma_map_single((void *)start, end - start, dir);
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+}
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+
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+static inline void dma_unmap_unaligned(dma_addr_t addr, size_t len,
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+ enum dma_data_direction dir)
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+{
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+ uintptr_t start, end;
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+
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+ start = ALIGN_DOWN((uintptr_t)addr, ARCH_DMA_MINALIGN);
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+ end = ALIGN((uintptr_t)(addr + len), ARCH_DMA_MINALIGN);
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+ dma_unmap_single(start, end - start, dir);
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+}
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+
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static void airoha_fe_maccr_init(struct airoha_eth *eth)
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{
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int p;
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@@ -434,7 +455,7 @@ static void airoha_qdma_reset_rx_desc(struct airoha_queue *q, int index,
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val = FIELD_PREP(QDMA_DESC_LEN_MASK, PKTSIZE_ALIGN);
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WRITE_ONCE(desc->ctrl, cpu_to_le32(val));
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- dma_map_single(desc, sizeof(*desc), DMA_TO_DEVICE);
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+ dma_map_unaligned(desc, sizeof(*desc), DMA_TO_DEVICE);
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}
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static void airoha_qdma_init_rx_desc(struct airoha_queue *q)
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@@ -916,14 +937,14 @@ static int airoha_eth_send(struct udevice *dev, void *packet, int length)
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WRITE_ONCE(desc->msg1, cpu_to_le32(msg1));
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WRITE_ONCE(desc->msg2, cpu_to_le32(0xffff));
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- dma_map_single(desc, sizeof(*desc), DMA_TO_DEVICE);
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+ dma_map_unaligned(desc, sizeof(*desc), DMA_TO_DEVICE);
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airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,
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FIELD_PREP(TX_RING_CPU_IDX_MASK, index));
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for (i = 0; i < 100; i++) {
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- dma_unmap_single(virt_to_phys(desc), sizeof(*desc),
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- DMA_FROM_DEVICE);
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+ dma_unmap_unaligned(virt_to_phys(desc), sizeof(*desc),
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+ DMA_FROM_DEVICE);
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if (desc->ctrl & QDMA_DESC_DONE_MASK)
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break;
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@@ -954,8 +975,8 @@ static int airoha_eth_recv(struct udevice *dev, int flags, uchar **packetp)
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q = &qdma->q_rx[qid];
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desc = &q->desc[q->head];
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- dma_unmap_single(virt_to_phys(desc), sizeof(*desc),
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- DMA_FROM_DEVICE);
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+ dma_unmap_unaligned(virt_to_phys(desc), sizeof(*desc),
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+ DMA_FROM_DEVICE);
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if (!(desc->ctrl & QDMA_DESC_DONE_MASK))
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return -EAGAIN;
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--
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2.51.0
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@ -0,0 +1,135 @@
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From 352c071bc18855238565cc6417a4c15a4e24bad8 Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Wed, 9 Jul 2025 12:28:09 +0300
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Subject: [PATCH 3/5] drivers/net/airoha_eth: fix stalling in package
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receiving
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ARCH_DMA_MINALIGN is 64 for ARMv7a/ARMv8a architectures, but RX/TX
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descriptors are 32 bytes long. So they may not be aligned on an
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ARCH_DMA_MINALIGN boundary. In case of RX path, this may cause the
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following problem
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1) Assume that a packet has arrived and the EVEN rx descriptor has been
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updated with the incoming data. The driver will invalidate and check
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the corresponding rx descriptor.
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2) Now suppose the next descriptor (ODD) has not yet completed.
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Please note that all even descriptors starts on 64-byte boundary,
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and the odd ones are NOT aligned on 64-byte boundary.
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Inspecting even descriptor, we will read the entire CPU cache line
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(64 bytes). So we read and sore in CPU cache also the next (odd)
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descriptor.
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3) Now suppose the next packet (for the odd rx descriptor) arrived
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while the first packet was being processed. So we have new data
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in memory but old data in cache.
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4) After packet processing (in arht_eth_free_pkt() function) we will
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cleanup the descriptor and put it back to rx queue.
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This will call flush_dcache_range() function for the even descriptor,
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so the odd one will be flushed as well (it is in the same cache line).
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So the old data will be written to the next rx descriptor.
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5) We get a freeze. The next descriptor is empty (so the driver is
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waiting for packets), but the hardware will continue to receive
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packets on other available descriptors. This will continue until
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the last available rx descriptor is full. Then the hardware will
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also freeze.
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The problem will be solved if:
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* do nothing in even descriptor case,
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* return 2 descriptor to the queue (current and previous) in the odd
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descriptor case.
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If the current descriptor is even nothing will be done, so no issue
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will arrise.
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If the current descriptor is odd, then the previous descriptor is on
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the same cache line. Both (current and previous) descriptors are not
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currently in use, so issue will not arrise as well.
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WARNING: The following restrictions on PKTBUFSRX must be held:
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* PKTBUFSRX is even,
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* PKTBUFSRX >= 4. Observations shows that PKTBUFSRX must be at least 8.
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The bug appears on 32-bit airoha platform, but should be present on
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64-bit as well.
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The code was tested both on 32-bit and 64-bit airoha boards.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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---
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drivers/net/airoha_eth.c | 33 ++++++++++++++++++++++++++-------
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1 file changed, 26 insertions(+), 7 deletions(-)
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diff --git a/drivers/net/airoha_eth.c b/drivers/net/airoha_eth.c
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index aae6922f3c7..44d4773bc5d 100644
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--- a/drivers/net/airoha_eth.c
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+++ b/drivers/net/airoha_eth.c
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@@ -435,13 +435,14 @@ static int airoha_fe_init(struct airoha_eth *eth)
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return 0;
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}
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-static void airoha_qdma_reset_rx_desc(struct airoha_queue *q, int index,
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- uchar *rx_packet)
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+static void airoha_qdma_reset_rx_desc(struct airoha_queue *q, int index)
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{
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struct airoha_qdma_desc *desc;
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+ uchar *rx_packet;
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u32 val;
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desc = &q->desc[index];
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+ rx_packet = net_rx_packets[index];
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index = (index + 1) % q->ndesc;
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dma_map_single(rx_packet, PKTSIZE_ALIGN, DMA_TO_DEVICE);
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@@ -463,7 +464,7 @@ static void airoha_qdma_init_rx_desc(struct airoha_queue *q)
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int i;
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for (i = 0; i < q->ndesc; i++)
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- airoha_qdma_reset_rx_desc(q, i, net_rx_packets[i]);
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+ airoha_qdma_reset_rx_desc(q, i);
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}
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static int airoha_qdma_init_rx_queue(struct airoha_queue *q,
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@@ -1003,12 +1004,30 @@ static int arht_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
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qid = 0;
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q = &qdma->q_rx[qid];
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- dma_map_single(packet, length, DMA_TO_DEVICE);
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+ /*
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+ * Due to cpu cache issue the airoha_qdma_reset_rx_desc() function
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+ * will always touch 2 descriptors placed on the same cacheline:
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+ * - if current descriptor is even, then current and next
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+ * descriptors will be touched
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+ * - if current descriptor is odd, then current and previous
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+ * descriptors will be touched
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+ *
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+ * Thus, to prevent possible destroying of rx queue, we should:
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+ * - do nothing in the even descriptor case,
|
||||
+ * - utilize 2 descriptors (current and previous one) in the
|
||||
+ * odd descriptor case.
|
||||
+ *
|
||||
+ * WARNING: Observations shows that PKTBUFSRX must be even and
|
||||
+ * larger than 7 for reliable driver operations.
|
||||
+ */
|
||||
+ if (q->head & 0x01) {
|
||||
+ airoha_qdma_reset_rx_desc(q, q->head - 1);
|
||||
+ airoha_qdma_reset_rx_desc(q, q->head);
|
||||
|
||||
- airoha_qdma_reset_rx_desc(q, q->head, packet);
|
||||
+ airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid), RX_RING_CPU_IDX_MASK,
|
||||
+ FIELD_PREP(RX_RING_CPU_IDX_MASK, q->head));
|
||||
+ }
|
||||
|
||||
- airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid), RX_RING_CPU_IDX_MASK,
|
||||
- FIELD_PREP(RX_RING_CPU_IDX_MASK, q->head));
|
||||
q->head = (q->head + 1) % q->ndesc;
|
||||
|
||||
return 0;
|
||||
--
|
||||
2.51.0
|
||||
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
From dc0ae3455f4344403e293c9b385653ad3fddb0b1 Mon Sep 17 00:00:00 2001
|
||||
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
|
||||
Date: Wed, 9 Jul 2025 12:28:10 +0300
|
||||
Subject: [PATCH 4/5] drivers/net/airoha_eth: enable hw padding of short tx
|
||||
packets
|
||||
|
||||
Transmission of short packets does not work good for XFI (GDM2) and
|
||||
HSGMII (GDM3) interfaces. The issue can be solved with:
|
||||
|
||||
- padding of short packets to 60 bytes
|
||||
- setting of PAD_EN bit in the corresponding REG_GDM_FWD_CFG(n)
|
||||
register.
|
||||
|
||||
The issue should present for the lan switch (GDM1) as well, but it does
|
||||
does not appear due to unknown reason.
|
||||
|
||||
This patch set PAD_EN bit for the used GDM.
|
||||
|
||||
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
|
||||
---
|
||||
drivers/net/airoha_eth.c | 13 +++++++++++--
|
||||
1 file changed, 11 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/airoha_eth.c b/drivers/net/airoha_eth.c
|
||||
index 53c722379c9..b2f73c7dbb7 100644
|
||||
--- a/drivers/net/airoha_eth.c
|
||||
+++ b/drivers/net/airoha_eth.c
|
||||
@@ -116,6 +116,7 @@
|
||||
(_n) == 2 ? GDM2_BASE : GDM1_BASE)
|
||||
|
||||
#define REG_GDM_FWD_CFG(_n) GDM_BASE(_n)
|
||||
+#define GDM_PAD_EN BIT(28)
|
||||
#define GDM_DROP_CRC_ERR BIT(23)
|
||||
#define GDM_IP4_CKSUM BIT(22)
|
||||
#define GDM_TCP_CKSUM BIT(21)
|
||||
@@ -423,8 +424,11 @@ static void airoha_fe_maccr_init(struct airoha_eth *eth)
|
||||
int p;
|
||||
|
||||
for (p = 1; p <= ARRAY_SIZE(eth->ports); p++) {
|
||||
- /* Disable any kind of CRC drop or offload */
|
||||
- airoha_fe_wr(eth, REG_GDM_FWD_CFG(p), 0);
|
||||
+ /*
|
||||
+ * Disable any kind of CRC drop or offload.
|
||||
+ * Enable padding of short TX packets to 60 bytes.
|
||||
+ */
|
||||
+ airoha_fe_wr(eth, REG_GDM_FWD_CFG(p), GDM_PAD_EN);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -920,6 +924,11 @@ static int airoha_eth_send(struct udevice *dev, void *packet, int length)
|
||||
u32 val;
|
||||
int i;
|
||||
|
||||
+ /*
|
||||
+ * There is no need to pad short TX packets to 60 bytes since the
|
||||
+ * GDM_PAD_EN bit set in the corresponding REG_GDM_FWD_CFG(n) register.
|
||||
+ */
|
||||
+
|
||||
dma_addr = dma_map_single(packet, length, DMA_TO_DEVICE);
|
||||
|
||||
qid = 0;
|
||||
--
|
||||
2.51.0
|
||||
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
From 75d82c8878b2ffff489fbc7a5c0381f8f6484ec2 Mon Sep 17 00:00:00 2001
|
||||
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
|
||||
Date: Fri, 3 Oct 2025 05:28:41 +0300
|
||||
Subject: [PATCH 5/5] net: airoha: increase the number of rx network buffers
|
||||
|
||||
According to commit 997786bbf473 ("drivers/net/airoha_eth: fix stalling
|
||||
in package receiving") the minimal possible value of SYS_RX_ETH_BUFFER
|
||||
is 4. Unfortunately it's too small for reliable ping.
|
||||
|
||||
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
|
||||
---
|
||||
configs/an7581_evb_defconfig | 1 +
|
||||
configs/an7583_evb_defconfig | 1 +
|
||||
2 files changed, 2 insertions(+)
|
||||
|
||||
diff --git a/configs/an7581_evb_defconfig b/configs/an7581_evb_defconfig
|
||||
index c74247e13db..aa1a30aad6a 100644
|
||||
--- a/configs/an7581_evb_defconfig
|
||||
+++ b/configs/an7581_evb_defconfig
|
||||
@@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_SYS_RX_ETH_BUFFER=8
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
diff --git a/configs/an7583_evb_defconfig b/configs/an7583_evb_defconfig
|
||||
index 057104b93af..c67444ae8bf 100644
|
||||
--- a/configs/an7583_evb_defconfig
|
||||
+++ b/configs/an7583_evb_defconfig
|
||||
@@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_SYS_RX_ETH_BUFFER=8
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
--
|
||||
2.51.0
|
||||
|
||||
Loading…
Add table
Reference in a new issue