bcm47xx: 6:12: refresh patches

- remove no_llseek in 831-old_gpio_wdt.patch, see
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cb787f4ac0c2e439ea8d7e6387b925f74576bdf8
- refresh remaining patches

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19708
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Kyle Hendry 2025-08-02 15:42:44 -07:00 committed by Christian Marangi
parent e61b1523bb
commit 08c8beec8c
No known key found for this signature in database
GPG key ID: AC001D09ADBFEAD7
6 changed files with 37 additions and 36 deletions

View file

@ -45,10 +45,12 @@ CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
@ -56,15 +58,16 @@ CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
@ -143,7 +146,6 @@ CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_SERIAL_8250_EXTENDED=y

View file

@ -1,6 +1,6 @@
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -27,6 +27,38 @@
@@ -31,6 +31,38 @@ extern int mips_sc_init(void);
extern void (*r4k_blast_dcache)(void);
extern void (*r4k_blast_icache)(void);
@ -39,7 +39,7 @@
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -60,6 +92,7 @@ static inline void flush_icache_line_ind
@@ -64,6 +96,7 @@ static inline void flush_icache_line_ind
static inline void flush_dcache_line_indexed(unsigned long addr)
{
@ -47,7 +47,7 @@
cache_op(Index_Writeback_Inv_D, addr);
}
@@ -83,11 +116,13 @@ static inline void flush_icache_line(uns
@@ -87,11 +120,13 @@ static inline void flush_icache_line(uns
static inline void flush_dcache_line(unsigned long addr)
{
@ -61,7 +61,7 @@
cache_op(Hit_Invalidate_D, addr);
}
@@ -160,6 +195,7 @@ static inline int protected_flush_icache
@@ -164,6 +199,7 @@ static inline int protected_flush_icache
return protected_cache_op(Hit_Invalidate_I_Loongson2, addr);
default:
@ -69,7 +69,7 @@
return protected_cache_op(Hit_Invalidate_I, addr);
}
}
@@ -172,6 +208,7 @@ static inline int protected_flush_icache
@@ -176,6 +212,7 @@ static inline int protected_flush_icache
*/
static inline int protected_writeback_dcache_line(unsigned long addr)
{
@ -77,7 +77,7 @@
return protected_cache_op(Hit_Writeback_Inv_D, addr);
}
@@ -193,8 +230,51 @@ static inline void invalidate_tcache_pag
@@ -197,8 +234,51 @@ static inline void invalidate_tcache_pag
unroll(times, _cache_op, insn, op, (addr) + (i++ * (lsize))); \
} while (0)
@ -130,7 +130,7 @@
static inline void extra##blast_##pfx##cache##lsize(void) \
{ \
unsigned long start = INDEX_BASE; \
@@ -204,6 +284,7 @@ static inline void extra##blast_##pfx##c
@@ -208,6 +288,7 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
@ -138,7 +138,7 @@
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache_unroll(32, kernel_cache, indexop, \
@@ -215,6 +296,7 @@ static inline void extra##blast_##pfx##c
@@ -219,6 +300,7 @@ static inline void extra##blast_##pfx##c
unsigned long start = page; \
unsigned long end = page + PAGE_SIZE; \
\
@ -146,7 +146,7 @@
do { \
cache_unroll(32, kernel_cache, hitop, start, lsize); \
start += lsize * 32; \
@@ -231,32 +313,33 @@ static inline void extra##blast_##pfx##c
@@ -235,32 +317,33 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
@ -200,7 +200,7 @@
#define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \
static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
@@ -281,65 +364,36 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
@@ -285,65 +368,36 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/* build blast_xxx_range, protected_blast_xxx_range */
@ -285,7 +285,7 @@
#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -429,6 +429,10 @@
@@ -432,6 +432,10 @@
#else
.set push
.set arch=r4000
@ -380,7 +380,7 @@
if (dc_lsize == 0)
r4k_blast_dcache = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -1669,6 +1681,17 @@ static void coherency_setup(void)
@@ -1665,6 +1677,17 @@ static void coherency_setup(void)
* silly idea of putting something else there ...
*/
switch (current_cpu_type()) {
@ -398,7 +398,7 @@
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1715,6 +1738,15 @@ void r4k_cache_init(void)
@@ -1711,6 +1734,15 @@ void r4k_cache_init(void)
extern void build_copy_page(void);
struct cpuinfo_mips *c = &current_cpu_data;
@ -414,7 +414,7 @@
probe_pcache();
probe_vcache();
setup_scache();
@@ -1777,7 +1809,15 @@ void r4k_cache_init(void)
@@ -1773,7 +1805,15 @@ void r4k_cache_init(void)
*/
local_r4k___flush_cache_all(NULL);
@ -432,7 +432,7 @@
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -958,6 +958,9 @@ void build_get_pgde32(u32 **p, unsigned
@@ -939,6 +939,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
@ -442,18 +442,18 @@
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1304,6 +1307,9 @@ static void build_r4000_tlb_refill_handl
@@ -1285,6 +1288,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
build_get_pmde64(&p, &l, &r, GPR_K0, GPR_K1); /* get pmd in GPR_K1 */
#else
+# ifdef CONFIG_BCM47XX
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+# endif
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
+#endif
build_get_pgde32(&p, GPR_K0, GPR_K1); /* get pgd in GPR_K1 */
#endif
@@ -1315,6 +1321,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, K0, K1);
@@ -1296,6 +1302,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, GPR_K0, GPR_K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_BCM47XX
@ -462,7 +462,7 @@
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -2016,6 +2025,9 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -1998,6 +2007,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
@ -472,7 +472,7 @@
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2062,6 +2074,9 @@ build_r4000_tlbchange_handler_tail(u32 *
@@ -2044,6 +2056,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);

View file

@ -15,10 +15,10 @@ This prevents the options from being delete with make kernel_oldconfig.
the memory. This only works with the Broadcom SoCs from the
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -141,6 +141,7 @@ config SSB_SFLASH
config SSB_EMBEDDED
@@ -142,6 +142,7 @@ config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
depends on SSB_DRIVER_MIPS
depends on PCI=n || SSB_PCICORE_HOSTMODE
+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
default y

View file

@ -2,7 +2,7 @@
+++ b/drivers/mtd/parsers/bcm47xxpart.c
@@ -98,6 +98,7 @@ static int bcm47xxpart_parse(struct mtd_
int trx_num = 0; /* Number of found TRX partitions */
int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
static const int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
int err;
+ bool found_nvram = false;

View file

@ -5,7 +5,7 @@ when a switch driver is in use.
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -4270,7 +4270,8 @@ static int tg3_power_down_prepare(struct
@@ -4270,7 +4270,8 @@ static void tg3_power_down_prepare(struc
static void tg3_power_down(struct tg3 *tp)
{
pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));

View file

@ -4,7 +4,7 @@ Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1755,6 +1755,15 @@ config WDT_MTX1
@@ -1803,6 +1803,15 @@ config WDT_MTX1
Hardware driver for the MTX-1 boards. This is a watchdog timer that
will reboot the machine after a 100 seconds timer expired.
@ -22,17 +22,17 @@ Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
depends on CPU_SB1
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -167,6 +167,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt
@@ -169,6 +169,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
+obj-$(CONFIG_GPIO_WDT) += old_gpio_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
--- /dev/null
+++ b/drivers/watchdog/old_gpio_wdt.c
@@ -0,0 +1,299 @@
@@ -0,0 +1,298 @@
+/*
+ * Driver for GPIO-controlled Hardware Watchdogs.
+ *
@ -231,7 +231,6 @@ Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
+
+static const struct file_operations gpio_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .unlocked_ioctl = gpio_wdt_ioctl,
+ .open = gpio_wdt_open,
+ .write = gpio_wdt_write,