// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "rtl839x.dtsi"
#include "rtl83xx_d-link_dgs-1210_common.dtsi"
#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
#include "rtl83xx_d-link_dgs-1210_gpio_sfp.dtsi"

/ {
	compatible = "d-link,dgs-1210-52", "realtek,rtl8393-soc";
	model = "D-Link DGS-1210-52";
};

&mdio_bus0 {
	/* External phy RTL8218B #1 */
	EXTERNAL_PHY(0)
	EXTERNAL_PHY(1)
	EXTERNAL_PHY(2)
	EXTERNAL_PHY(3)
	EXTERNAL_PHY(4)
	EXTERNAL_PHY(5)
	EXTERNAL_PHY(6)
	EXTERNAL_PHY(7)

	/* External phy RTL8218B #2 */
	EXTERNAL_PHY(8)
	EXTERNAL_PHY(9)
	EXTERNAL_PHY(10)
	EXTERNAL_PHY(11)
	EXTERNAL_PHY(12)
	EXTERNAL_PHY(13)
	EXTERNAL_PHY(14)
	EXTERNAL_PHY(15)

	/* External phy RTL8218B #3 */
	EXTERNAL_PHY(16)
	EXTERNAL_PHY(17)
	EXTERNAL_PHY(18)
	EXTERNAL_PHY(19)
	EXTERNAL_PHY(20)
	EXTERNAL_PHY(21)
	EXTERNAL_PHY(22)
	EXTERNAL_PHY(23)

	/* External phy RTL8218B #4 */
	EXTERNAL_PHY(24)
	EXTERNAL_PHY(25)
	EXTERNAL_PHY(26)
	EXTERNAL_PHY(27)
	EXTERNAL_PHY(28)
	EXTERNAL_PHY(29)
	EXTERNAL_PHY(30)
	EXTERNAL_PHY(31)

	/* External phy RTL8218B #5 */
	EXTERNAL_PHY(32)
	EXTERNAL_PHY(33)
	EXTERNAL_PHY(34)
	EXTERNAL_PHY(35)
	EXTERNAL_PHY(36)
	EXTERNAL_PHY(37)
	EXTERNAL_PHY(38)
	EXTERNAL_PHY(39)

	/* External phy RTL8218B #6 */
	EXTERNAL_PHY(40)
	EXTERNAL_PHY(41)
	EXTERNAL_PHY(42)
	EXTERNAL_PHY(43)
	EXTERNAL_PHY(44)
	EXTERNAL_PHY(45)
	EXTERNAL_PHY(46)
	EXTERNAL_PHY(47)

	/* External phy RTL8214FC */
	EXTERNAL_SFP_PHY_FULL(48, 0)
	EXTERNAL_SFP_PHY_FULL(49, 1)
	EXTERNAL_SFP_PHY_FULL(50, 2)
	EXTERNAL_SFP_PHY_FULL(51, 3)
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
		SWITCH_PORT_SDS(7, 8, 1, qsgmii)

		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
		SWITCH_PORT_SDS(15, 16, 3, qsgmii)

		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
		SWITCH_PORT_SDS(23, 24, 5, qsgmii)

		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
		SWITCH_PORT_SDS(31, 32, 7, qsgmii)

		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
		SWITCH_PORT_SDS(39, 40, 9, qsgmii)

		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
		SWITCH_PORT_SDS(47, 48, 11, qsgmii)

		SWITCH_PORT_SDS(48, 49, 12, qsgmii)
		SWITCH_PORT_SDS(49, 50, 12, qsgmii)
		SWITCH_PORT_SDS(50, 51, 12, qsgmii)
		SWITCH_PORT_SDS(51, 52, 12, qsgmii)

		/* CPU-Port */
		port@52 {
			ethernet = <&ethernet0>;
			reg = <52>;
			phy-mode = "internal";
			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};
	};
};
