// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;

#include "rtl9302_zyxel_xgs1x10-12-common.dtsi"

/ {
	compatible = "zyxel,xgs1010-12-a1", "realtek,rtl930x-soc";
	model = "Zyxel XGS1010-12 A1";

	virtual_flash {
		compatible = "mtd-concat";

		devices = <&fwconcat0 &fwconcat1 &fwconcat2>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "firmware";
				reg = <0x0 0x0>;
				compatible = "openwrt,uimage", "denx,uimage";
				openwrt,ih-magic = <0x93001010>;
			};
		};
	};
};

&spi0 {
	status = "okay";
	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0xe0000>;
				read-only;
			};

			partition@e0000 {
				label = "u-boot-env";
				reg = <0xe0000 0x10000>;
			};

			partition@f0000 {
				label = "u-boot-env2";
				reg = <0xf0000 0x10000>;
				read-only;
			};

			/*
			 * If additional space is needed in the future, the JFFS2 partitions could
			 * be added to the concatenated firmware partition. They are only reserved
			 * for now to allow running the XGS1210-12 firmware, which can be useful
			 * as a reference during development.
			 */

			partition@100000 {
				label = "jffs2-cfg";
				reg = <0x100000 0x100000>;
			};

			partition@200000 {
				label = "jffs2-log";
				reg = <0x200000 0x100000>;
			};

			fwconcat1: partition@300000 {
				label = "fwconcat1";
				reg = <0x300000 0x510000>;
			};

			partition@810000 {
				reg = <0x810000 0x10000>;
				label = "htp-log";
				read-only;
			};

			fwconcat2: partition@820000 {
				label = "fwconcat2";
				reg = <0x820000 0xd0000>;
			};

			partition@8f0000 {
				reg = <0x8f0000 0x10000>;
				label = "htp-flash-test";
				read-only;
			};

			fwconcat0: partition@900000 {
				label = "fwconcat0";
				reg = <0x900000 0x700000>;
			};
		};
	};
};

&phy24 {
	realtek,smi-address = <8>;
};

&phy25 {
	realtek,smi-address = <9>;
};
