11 commits

Author	SHA1	Message	Date
Steve Markgraf	3ea62bda0e	lib: add support for dual 12 bit FPGA source	2025-03-25 23:58:48 +01:00
Steve Markgraf	420882d71c	add internal buffering and dedicated output thread	2025-03-21 23:18:14 +01:00
Steve Markgraf	7fe6c39954	lib: add IQ converter	2025-03-09 17:46:25 +01:00
Steve Markgraf	595fc6b7b8	add 8 bit IQ support	2025-03-03 23:17:34 +01:00
Steve Markgraf	273c6bbca4	WIP: Add support for hsdaohSDR	2025-03-02 23:13:23 +01:00
Steve Markgraf	3305d0cf8a	WIP: Support for format conversion and multiple streams	2025-02-27 23:05:48 +01:00
Steve Markgraf	83342ad691	switch to struct for callback	2025-02-14 22:17:09 +01:00
Steve Markgraf	ccd8727801	remove some stale code	2024-12-15 01:05:38 +01:00
Steve Markgraf	9b910ef0a7	lib: add code to control a data source via EDID RAM	2024-12-12 00:18:45 +01:00
Steve Markgraf	21894c06c1	Add support for hsdaoh-rp2350 and CRC16	2024-11-18 00:22:56 +01:00
Steve Markgraf	46af0781e7	initial commit	2024-05-05 15:17:17 +02:00