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33 commits 2 branches 0 tags 278 KiB
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11 commits

Author SHA1 Message Date
Steve Markgraf
dccfb3a5f2 lib: add support for dual 12 bit FPGA source 2025-08-23 21:41:32 +02:00
Steve Markgraf
ff55b5acc6 add internal buffering and dedicated output thread 2025-08-23 21:38:04 +02:00
Steve Markgraf
ae0d94eba6 lib: add IQ converter 2025-08-23 21:37:58 +02:00
Steve Markgraf
de7c63b090 add 8 bit IQ support 2025-08-23 21:37:53 +02:00
Steve Markgraf
768c4f5900 Add support for hsdaohSDR 2025-08-23 21:37:46 +02:00
Steve Markgraf
c478ee1edc Support for format conversion and multiple streams 2025-08-23 21:37:27 +02:00
Steve Markgraf
83342ad691 switch to struct for callback 2025-02-14 22:17:09 +01:00
Steve Markgraf
ccd8727801 remove some stale code 2024-12-15 01:05:38 +01:00
Steve Markgraf
9b910ef0a7 lib: add code to control a data source via EDID RAM 2024-12-12 00:18:45 +01:00
Steve Markgraf
21894c06c1 Add support for hsdaoh-rp2350 and CRC16 2024-11-18 00:22:56 +01:00
Steve Markgraf
46af0781e7 initial commit 2024-05-05 15:17:17 +02:00