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33 commits 2 branches 0 tags 364 KiB
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12 commits

Author SHA1 Message Date
montoyatim01
03f618b941 Add 16-bit signed option 
- Include an argument to set 16-bit output to signed. Default behavior is unsigned
- Utilizes a new (third) argument in the "hsdaoh_open" function to set a dev variable
- format_convert uses intermediate value to unpack 12-bit data, then ternary operator to store signed/unsigned
 2025-04-25 09:02:42 -07:00
Steve Markgraf
3ea62bda0e lib: add support for dual 12 bit FPGA source 2025-03-25 23:58:48 +01:00
Steve Markgraf
420882d71c add internal buffering and dedicated output thread 2025-03-21 23:18:14 +01:00
Steve Markgraf
7fe6c39954 lib: add IQ converter 2025-03-09 17:46:25 +01:00
Steve Markgraf
595fc6b7b8 add 8 bit IQ support 2025-03-03 23:17:34 +01:00
Steve Markgraf
273c6bbca4 WIP: Add support for hsdaohSDR 2025-03-02 23:13:23 +01:00
Steve Markgraf
3305d0cf8a WIP: Support for format conversion and multiple streams 2025-02-27 23:05:48 +01:00
Steve Markgraf
83342ad691 switch to struct for callback 2025-02-14 22:17:09 +01:00
Steve Markgraf
ccd8727801 remove some stale code 2024-12-15 01:05:38 +01:00
Steve Markgraf
9b910ef0a7 lib: add code to control a data source via EDID RAM 2024-12-12 00:18:45 +01:00
Steve Markgraf
21894c06c1 Add support for hsdaoh-rp2350 and CRC16 2024-11-18 00:22:56 +01:00
Steve Markgraf
46af0781e7 initial commit 2024-05-05 15:17:17 +02:00