add support for hsdaohSDR

README.md

@@ -1,7 +1,7 @@
 # hsdaoh-rp2350 - High Speed Data Acquisition over HDMI
-## Stream up to 128 MByte/s from your Raspberry Pi Pico2 to your PC
+## Stream up to 175 MByte/s from your Raspberry Pi Pico2 to your PC
 
-Using $5 USB3 HDMI capture sticks based on the MacroSilicon MS2130, this project allows to stream out up to 128 MByte/s of real time data from an RP2350 (with overclocking) to a host computer with USB3.
+Using $5 USB3 HDMI capture sticks based on the MacroSilicon MS2130, this project allows to stream out up to 175 MByte/s of real time data from an RP2350 (with overclocking) to a host computer with USB3.
 For more information and the host library, see the [main repository](https://github.com/steve-m/hsdaoh) and the [talk at OsmoDevcon '24](https://media.ccc.de/v/osmodevcon2024-200-low-cost-high-speed-data-acquisition-over-hdmi).
 
 ![Raspberry Pi Pico2 with MS2130 stick](https://steve-m.de/projects/hsdaoh/pico2_hsdaoh.jpg)
@@ -58,6 +58,10 @@ This example needs to be built with an RP2350B-board in order to work correctly:
 
     cmake -DPICO_PLATFORM=rp2350 -DPICO_BOARD=solderparty_rp2350_stamp_xl ../
 
+### sdr
+
+This app can be used for attaching the [hsdaohSDR prototype](https://github.com/steve-m/hsdaohSDR) to an RP2350B instead of the Tang nano 20K FPGA board. Contains PIO code for packing the 2x 10 bit AD9218 data, and also implements a USB UART to I2C bridge for controlling the tuner. Like the dual_external_adc, it also needs to be built with a RP2350B board.
+
 ## Credits
 
 hsdaoh-rp2350 is developed by Steve Markgraf, and is based on the [dvi_out_hstx_encoder](https://github.com/raspberrypi/pico-examples/tree/master/hstx/dvi_out_hstx_encoder) example, and code by Shuichi Takano [implementing the HDMI data island encoding](https://github.com/shuichitakano/pico_lib/blob/master/dvi/data_packet.cpp), required to send HDMI info frames.

apps/CMakeLists.txt

@@ -1,5 +1,6 @@
 add_subdirectory(counter)
 add_subdirectory(external_adc)
 add_subdirectory(dual_external_adc)
+add_subdirectory(sdr)
 add_subdirectory(internal_adc)
 add_subdirectory(logic_analyzer)

apps/sdr/CMakeLists.txt

@@ -0,0 +1,21 @@
+add_executable(sdr
+	sdr.c
+)
+
+target_compile_options(sdr PRIVATE -Wall)
+
+target_link_libraries(sdr
+	pico_stdlib
+	pico_util
+	hardware_pio
+	hardware_dma
+	hardware_i2c
+	libpicohsdaoh
+)
+pico_generate_pio_header(sdr ${CMAKE_CURRENT_LIST_DIR}/adc_20bit_input.pio)
+
+# enable usb output, disable uart output
+pico_enable_stdio_usb(sdr 1)
+
+# create map/bin/hex file etc.
+pico_add_extra_outputs(sdr)

apps/sdr/adc_20bit_input.pio

@@ -0,0 +1,106 @@
+;
+; Copyright (c) 2025 Steve Markgraf <steve@steve-m.de>
+;
+; SPDX-License-Identifier: BSD-3-Clause
+;
+; Sample 2x10 bit parallel ADC (AD9218) every 4 PIO cycles on rising clock edge,
+; pack four 20 bit samples in five 16 bit words
+; ADC clock output as side-set
+;
+; Data being pushed to the FIFO, four 20 bit samples A-D
+; First word:  A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
+; Second word: A19 A18 A17 A16 B11 B10 B09 B08 B07 B06 B05 B04 B03 B02 B01 B00
+; Third word:  B19 B18 B17 B16 B15 B14 B13 B12 C07 C06 C05 C04 C03 C02 C01 C00
+; Fourth word: C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C09 C08 D03 D02 D01 D00
+; Fifth word:  D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D09 D08 D07 D06 D05 D04
+
+.pio_version 1
+.program adc_20bit_input
+.side_set 1
+
+public entry_point:
+
+.wrap_target
+	;----------------------------------------------------------------------------------------
+	mov osr, pins	side 0			; SAMP A
+
+	; OSR is now A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
+
+	in osr, 16	side 1			; AUTOPUSH: A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
+	out null, 16	side 1
+	in osr, 4	side 0			; ISR is now A19 A18 A17 A16
+	;----------------------------------------------------------------------------------------
+	mov osr, pins	side 0			; SAMP B
+
+	in osr, 12	side 1			; AUTOPUSH: A19 A18 A17 A16 B11 B10 B09 B08 B07 B06 B05 B04 B03 B02 B01 B00
+	out null, 12	side 1
+	in osr, 8	side 0			; ISR is now B19 B18 B17 B16 B15 B14 B13 B12
+	;----------------------------------------------------------------------------------------
+	mov osr, pins	side 0			; SAMP C
+
+	in osr, 8	side 1			; AUTOPUSH: B19 B18 B17 B16 B15 B14 B13 B12 C07 C06 C05 C04 C03 C02 C01 C00
+	out null, 8	side 1
+	in osr, 12	side 0			; ISR is now C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C09 C08
+	;----------------------------------------------------------------------------------------
+	mov osr, pins	side 0			; SAMP D
+
+	in osr, 4	side 1			; AUTOPUSH: C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C09 C08 D03 D02 D01 D00
+	out null, 4	side 1
+	in osr, 16	side 0			; AUTOPUSH: D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D09 D08 D07 D06 D05 D04
+	;----------------------------------------------------------------------------------------
+.wrap
+
+% c-sdk {
+static inline void adc_20bit_input_program_init(PIO pio, uint sm, uint offset, uint pin, uint clk_pin)
+{
+	pio_sm_config c = adc_20bit_input_program_get_default_config(offset);
+
+	// Set the IN base pin to the provided `pin` parameter.
+	sm_config_set_in_pins(&c, pin);
+
+	// configure CLK pin for side-set
+	sm_config_set_sideset_pins(&c, clk_pin);
+	sm_config_set_sideset(&c, 1, false, false);
+
+	pio_sm_set_consecutive_pindirs(pio, sm, clk_pin, 1, true);
+	pio_gpio_init(pio, clk_pin);
+
+	gpio_disable_pulls(clk_pin);
+//	gpio_set_drive_strength(clk_pin, GPIO_DRIVE_STRENGTH_12MA);
+//	gpio_set_slew_rate(clk_pin, GPIO_SLEW_RATE_FAST);
+
+	// Set the pin directions to input at the PIO
+	// Set D0-D19 of the ADC(s) as input
+	pio_sm_set_consecutive_pindirs(pio, sm, pin, 20, false);
+
+	// Connect these GPIOs to this PIO block
+	for (int i = pin; i < (pin+20); i++) {
+		//gpio_pull_down(i);
+		pio_gpio_init(pio, i);
+	}
+
+	sm_config_set_in_shift(
+		&c,
+		false,	// Shift-to-right = false (i.e. shift to left)
+		true,	// Autopush enabled
+		16	// Autopush threshold = 16
+	);
+
+	// required in order to set shift-to-right to true (for the out, null ops)
+	sm_config_set_out_shift(
+		&c,
+		true,	// Shift-to-right = true
+		false,	// Autopush disabled
+		1	// Autopush threshold: ignored
+	);
+
+	// We only receive, so disable the TX FIFO to make the RX FIFO deeper.
+	sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_RX);
+
+	sm_config_set_clkdiv(&c, 1.00f);
+
+	// Load our configuration, and start the program from the beginning
+	pio_sm_init(pio, sm, offset, &c);
+	pio_sm_set_enabled(pio, sm, true);
+}
+%}

apps/sdr/sdr.c

@@ -0,0 +1,242 @@
+/*
+ * hsdaoh - High Speed Data Acquisition over MS213x USB3 HDMI capture sticks
+ * Implementation for the Raspberry Pi RP2350 HSTX peripheral
+ *
+ * External dual 10-bit ADC example, connected to the PIO
+ * used for hsdaohSDR
+ *
+ * Copyright (c) 2024-2025 by Steve Markgraf <steve@steve-m.de>
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the author nor the names of its contributors may
+ *    be used to endorse or promote products derived from this software
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "pico/stdlib.h"
+#include "hardware/clocks.h"
+#include "hardware/irq.h"
+#include "hardware/sync.h"
+#include "hardware/vreg.h"
+#include "hardware/pll.h"
+#include "hardware/dma.h"
+#include "hardware/pio.h"
+#include "hardware/i2c.h"
+
+#include <stdio.h>
+
+#include "picohsdaoh.h"
+#include "adc_20bit_input.pio.h"
+
+#define I2C_TIMEOUT 50000	/* 50 ms */
+
+/* The PIO is running with sys_clk/1, and needs 4 cycles per sample,
+ * so the ADC clock is sys_clk/4 */
+#define SYS_CLK		264000	// 66 MHz ADC clock
+#define HSTX_CLK_MHZ	432
+
+// For alignment of 5x16 bit words in the payload, so that every line starts with word 0
+#define ADC_DATA_LEN	(RBUF_SLICE_LEN - 5)
+
+#define PIO_INPUT_PIN_BASE 27
+#define PIO_OUTPUT_CLK_PIN 26
+
+#define DMACH_PIO_PING 0
+#define DMACH_PIO_PONG 1
+
+static bool pio_dma_pong = false;
+uint16_t ringbuffer[RBUF_DEFAULT_TOTAL_LEN];
+int ringbuf_head = 2;
+
+void __scratch_y("") pio_dma_irq_handler()
+{
+	uint ch_num = pio_dma_pong ? DMACH_PIO_PONG : DMACH_PIO_PING;
+	dma_channel_hw_t *ch = &dma_hw->ch[ch_num];
+	dma_hw->intr = 1u << ch_num;
+	pio_dma_pong = !pio_dma_pong;
+
+	ringbuf_head = (ringbuf_head + 1) % RBUF_DEFAULT_SLICES;
+
+	ch->write_addr = (uintptr_t)&ringbuffer[ringbuf_head * RBUF_SLICE_LEN];
+	ch->transfer_count = ADC_DATA_LEN;
+
+	hsdaoh_update_head(0, ringbuf_head);
+}
+
+void init_pio_input(void)
+{
+	PIO pio = pio0;
+
+	/* move up GPIO base of PIO to access all ADC pins */
+	pio_set_gpio_base(pio, 16);
+
+	uint offset = pio_add_program(pio, &adc_20bit_input_program);
+	uint sm_data = pio_claim_unused_sm(pio, true);
+
+	adc_20bit_input_program_init(pio, sm_data, offset, PIO_INPUT_PIN_BASE, PIO_OUTPUT_CLK_PIN);
+
+	dma_channel_config c;
+	c = dma_channel_get_default_config(DMACH_PIO_PING);
+	channel_config_set_chain_to(&c, DMACH_PIO_PONG);
+	channel_config_set_dreq(&c, pio_get_dreq(pio, sm_data, false));
+	channel_config_set_read_increment(&c, false);
+	channel_config_set_write_increment(&c, true);
+	channel_config_set_transfer_data_size(&c, DMA_SIZE_16);
+
+	dma_channel_configure(
+		DMACH_PIO_PING,
+		&c,
+		&ringbuffer[0 * RBUF_SLICE_LEN],
+		&pio->rxf[sm_data],
+		ADC_DATA_LEN,
+		false
+	);
+	c = dma_channel_get_default_config(DMACH_PIO_PONG);
+	channel_config_set_chain_to(&c, DMACH_PIO_PING);
+	channel_config_set_dreq(&c, pio_get_dreq(pio, sm_data, false));
+	channel_config_set_read_increment(&c, false);
+	channel_config_set_write_increment(&c, true);
+	channel_config_set_transfer_data_size(&c, DMA_SIZE_16);
+
+	dma_channel_configure(
+		DMACH_PIO_PONG,
+		&c,
+		&ringbuffer[1 * RBUF_SLICE_LEN],
+		&pio->rxf[sm_data],
+		ADC_DATA_LEN,
+		false
+	);
+
+	dma_hw->ints0 |= (1u << DMACH_PIO_PING) | (1u << DMACH_PIO_PONG);
+	dma_hw->inte0 |= (1u << DMACH_PIO_PING) | (1u << DMACH_PIO_PONG);
+	irq_set_exclusive_handler(DMA_IRQ_0, pio_dma_irq_handler);
+	irq_set_enabled(DMA_IRQ_0, true);
+
+	dma_channel_start(DMACH_PIO_PING);
+}
+
+#define OVERVOLT 1
+
+int main()
+{
+#ifdef OVERVOLT
+	/* set maximum 'allowed' voltage without voiding warranty */
+	vreg_set_voltage(VREG_VOLTAGE_MAX);
+	//vreg_disable_voltage_limit();
+	//vreg_set_voltage(VREG_VOLTAGE_1_80);
+	sleep_ms(1);
+#endif
+	set_sys_clock_khz(SYS_CLK, true);
+	int usbdiv;
+
+	/* set USB clock to clk_sys/n */
+//	usbdiv = SYS_CLK/48000;
+//	hw_write_masked(&clocks_hw->clk[clk_usb].ctrl,
+//			CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS << CLOCKS_CLK_USB_CTRL_AUXSRC_LSB,
+//			CLOCKS_CLK_USB_CTRL_AUXSRC_BITS);
+
+	usbdiv = HSTX_CLK_MHZ / 48;
+
+	hw_write_masked(&clocks_hw->clk[clk_usb].div,
+			usbdiv << CLOCKS_CLK_USB_DIV_INT_LSB,
+			CLOCKS_CLK_USB_DIV_INT_BITS);
+
+	/* Initialize USB PLL for HSTX clock */
+	pll_init(pll_usb, 1, HSTX_CLK_MHZ * 2 * MHZ, 2, 1);
+
+	/* set HSTX divider to 1 */
+	hw_write_masked(
+		&clocks_hw->clk[clk_hstx].div,
+		1 << CLOCKS_CLK_HSTX_DIV_INT_LSB,
+		CLOCKS_CLK_HSTX_DIV_INT_BITS
+	);
+
+	/* set HSTX clock source to PLL_USB */
+	hw_write_masked(&clocks_hw->clk[clk_hstx].ctrl,
+			CLOCKS_CLK_HSTX_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB << CLOCKS_CLK_HSTX_CTRL_AUXSRC_LSB,
+			CLOCKS_CLK_HSTX_CTRL_AUXSRC_BITS);
+
+	stdio_init_all();
+
+	hsdaoh_init(GPIO_DRIVE_STRENGTH_12MA, GPIO_SLEW_RATE_FAST);
+	hsdaoh_add_stream(0, PIO_10BIT_IQ, (SYS_CLK/8) * 1000, ADC_DATA_LEN, RBUF_DEFAULT_SLICES, ringbuffer);
+	hsdaoh_start();
+	init_pio_input();
+
+	i2c_init(i2c_default, 100 * 1000);
+	gpio_set_function(PICO_DEFAULT_I2C_SDA_PIN, GPIO_FUNC_I2C);
+	gpio_set_function(PICO_DEFAULT_I2C_SCL_PIN, GPIO_FUNC_I2C);
+	gpio_pull_up(PICO_DEFAULT_I2C_SDA_PIN);
+	gpio_pull_up(PICO_DEFAULT_I2C_SCL_PIN);
+
+	/* handle tty -> I2C interface for I2C tuner access */
+	uint8_t i2c_addr, reg, val;
+	int ret;
+
+	while (1) {
+		char c = getchar();
+
+		switch (c) {
+		case 'r':
+			i2c_addr = getchar();
+			reg = getchar();
+
+			// special handling for RT7x0 read
+			if (i2c_addr == 0x7a) {
+				uint8_t regnull = 0;
+				uint8_t bytes_to_read = reg + 1;
+				uint8_t response[256];
+				ret = i2c_write_timeout_us(i2c_default, i2c_addr, &regnull, 1, false, I2C_TIMEOUT);
+				if (ret == 1) {
+					ret = i2c_read_timeout_us(i2c_default, i2c_addr, response, bytes_to_read, false, I2C_TIMEOUT);
+					if (ret == bytes_to_read)
+						ret = 1;
+
+					val = response[reg];
+				}
+
+			} else {
+				ret = i2c_write_timeout_us(i2c_default, i2c_addr, &reg, 1, false, I2C_TIMEOUT);
+				if (ret == 1)
+					ret = i2c_read_timeout_us(i2c_default, i2c_addr, &val, 1, false, I2C_TIMEOUT);
+			}
+
+			putchar_raw((ret == 1) ? 1 : 0); // I2C ACK
+			putchar_raw(val);
+
+			break;
+		case 'w':
+			i2c_addr = getchar();
+			val = getchar();
+			reg = getchar();
+			uint8_t wr[2] = { reg, val };
+			ret = i2c_write_timeout_us(i2c_default, i2c_addr, wr, sizeof(wr), false, I2C_TIMEOUT);
+			putchar_raw((ret == sizeof(wr)) ? 1 : 0);
+			break;
+
+		default:
+			break;
+		}
+
+	}
+}