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https://github.com/steve-m/hsdaoh-fpga.git
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35 lines
658 B
Text
35 lines
658 B
Text
[General]
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ipc_version=4
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file=fifo_hs
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module=FIFO_HS_Top
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target_device=gw1nsr4c-000
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type=fifo_hs
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version=1.0
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[Config]
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AlmostEmptyFlag=true
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AlmostEmptyFlagItem=Empty_Single Threshold Constant Parameter
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AlmostFullFlag=false
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AlmostFullFlagItem=Full_Single Threshold Constant Parameter
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BSRAM=true
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ControlledByRdEn=false
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ECCSelected=false
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EmptyClear=1
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EmptySet=1
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EnReset=false
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FirstWordFallThrough=false
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FullClear=1
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FullSet=1
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LANG=0
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OutputRegistersSelected=false
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REG=false
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ReadDataNum=false
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ReadDataWidth=16
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ReadDepth=8192
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ResetSynchronization=false
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SSRAM=false
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StandardFIFO=true
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Synthesis_tool=GowinSynthesis
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WriteDataNum=false
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WriteDataWidth=16
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WriteDepth=8192
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