hsdaoh-fpga/hsdaoh_primer20k_test/hsdaoh_primer20k_test.sdc
2024-05-05 01:03:12 +02:00

2 lines
No EOL
144 B
Tcl

create_clock -name sys_clk -period 37.04 [get_ports {sys_clk}] -add
//create_clock -name adc_clkout -period 12.3 [get_ports {adc_clkout}] -add