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Fix bug

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This commit is contained in:
Jie Feng 2024-11-04 21:52:36 +08:00
parent 09bd624906
commit 5bba9d498d
1 changed files with 1 additions and 1 deletions
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hsdaoh_nano9k_1bit_sdr/top.v
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@ -183,7 +183,7 @@ module top (
always @(posedge clk_data) begin
counter <= counter + 1'b1;
if (counter == 0) begin
accumulator <= rf_in_1bit;
accumulator <= rf_in_1bit_q0 + rf_in_1bit_q1;
fifo_in <= accumulator;
end else begin
accumulator <= accumulator + rf_in_1bit_q0 + rf_in_1bit_q1;