16140fd383
This FW for the New Packet Radio project was taken from the Hackaday project https://hackaday.io/project/164092-npr-new-packet-radio The source code is original without any modifications, ver. 2020_06_29.
425 lines
No EOL
16 KiB
C++
425 lines
No EOL
16 KiB
C++
// This file is part of "NPR70 modem firmware" software
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// (A GMSK data modem for ham radio 430-440MHz, at several hundreds of kbps)
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// Copyright (c) 2017-2020 Guillaume F. F4HDK (amateur radio callsign)
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//
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// "NPR70 modem firmware" is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// "NPR70 modem firmware" is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with "NPR70 modem firmware". If not, see <http://www.gnu.org/licenses/>
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#include "W5500.h"
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#include "mbed.h"
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#include "global_variables.h"
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#include "Eth_IPv4.h"
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void W5500_read_long(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr, unsigned char* RX_data, int RX_size)
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{
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unsigned char W5_command[20];
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unsigned char trash[20];
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W5_command[0] = W5500_addr / 256;
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W5_command[1] = W5500_addr & 0xFF;
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W5_command[2] = (bloc_addr * 0x08);
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*(SPI_p_loc->cs)=0;
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RX_data[0]=0;
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SPI_p_loc->spi_port->transfer_2 (W5_command, 3, trash, 3);
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SPI_p_loc->spi_port->transfer_2 (trash, RX_size, RX_data, RX_size);
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wait_us(1);
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*(SPI_p_loc->cs)=1;
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wait_us(2);
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}
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void W5500_write_long(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr, unsigned char* TX_data, int TX_size) {
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unsigned char W5_command[4];
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static unsigned char trash[1600];
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W5_command[0] = W5500_addr / 256;
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W5_command[1] = W5500_addr & 0xFF;
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W5_command[2] = (bloc_addr * 0x08) + 4;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (W5_command, 3, trash, 3);
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//wait_us(10);
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SPI_p_loc->spi_port->transfer_2 (TX_data, TX_size, trash, 0);
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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}
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void W5500_read_short(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr, unsigned char* RX_data_ext, int RX_size) {
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unsigned char TX_data_loc[20];
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unsigned char RX_data_loc[20];
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int i;
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TX_data_loc[0] = W5500_addr / 256;
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TX_data_loc[1] = W5500_addr & 0xFF;
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TX_data_loc[2] = (bloc_addr * 0x08) ;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (TX_data_loc, RX_size+3, RX_data_loc, RX_size+3);
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for (i=0; i < RX_size; i++) {
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RX_data_ext[i] = RX_data_loc[i+3];
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}
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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}
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void W5500_write_short(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr, unsigned char* TX_data_ext, int TX_size) {
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unsigned char TX_data_loc[10];
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unsigned char trash[10];
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int i;
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TX_data_loc[0] = W5500_addr / 256;
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TX_data_loc[1] = W5500_addr & 0xFF;
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TX_data_loc[2] = (bloc_addr * 0x08) + 4;
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for (i=0; i < TX_size; i++) {
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TX_data_loc[i+3] = TX_data_ext[i];
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}
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (TX_data_loc, TX_size+3, trash, 0);
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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}
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unsigned char W5500_read_byte(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr) {
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unsigned char TX_data_loc[20];
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unsigned char RX_data_loc[20];
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unsigned char data_out;
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TX_data_loc[0] = W5500_addr / 256;
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TX_data_loc[1] = W5500_addr & 0xFF;
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TX_data_loc[2] = (bloc_addr * 0x08) ;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (TX_data_loc, 4, RX_data_loc, 4);
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wait_us(1);
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SPI_p_loc->cs->write(1);
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data_out = RX_data_loc[3];
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return data_out;
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wait_us(2);
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}
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void W5500_write_byte(W5500_chip* SPI_p_loc, unsigned int W5500_addr, unsigned char bloc_addr, unsigned char data) {
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unsigned char TX_data_loc[10];
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unsigned char trash[10];
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TX_data_loc[0] = W5500_addr / 256;
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TX_data_loc[1] = W5500_addr & 0xFF;
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TX_data_loc[2] = (bloc_addr * 0x08) + 4;
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TX_data_loc[3] = data;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (TX_data_loc, 4, trash, 0);
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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}
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void W5500_Phy_off_2sec(W5500_chip* SPI_p_loc) {
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//unsigned char phy_config[1];
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0x70);
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wait(5);
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xF8);
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}
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int W5500_read_received_size(W5500_chip* SPI_p_loc, int sock_nb) {
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int size=9999, previous_size=9999;
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unsigned char data[10];
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do {
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previous_size = size;
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W5500_read_short(SPI_p_loc, 0x0026, (sock_nb*4)+1, data, 2);
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size = data[1] + data[0]*256;
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} while (previous_size != size);
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//printf("size:%d\r\n", size);
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return size;
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}
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int W5500_read_TX_free_size(W5500_chip* SPI_p_loc, int sock_nb) {
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int size=9999, previous_size=9999;
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unsigned char data[10];
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do {
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previous_size = size;
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W5500_read_short(SPI_p_loc, 0x0020, (sock_nb*4)+1, data, 2);
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size = data[1] + data[0]*256;
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} while (previous_size != size);
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//printf("size:%d\r\n", size);
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return size;
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}
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void W5500_read_RX_buffer(W5500_chip* SPI_p_loc, int sock_nb, unsigned char* data, int size) {
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unsigned char read_pointer_raw[10];
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unsigned short read_pointer;
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W5500_read_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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read_pointer = read_pointer_raw[1] + read_pointer_raw[0] * 256;
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W5500_read_long(SPI_p_loc, read_pointer, (sock_nb*4)+3, data, size);
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read_pointer = read_pointer + size ;
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read_pointer_raw[0] = read_pointer / 256;
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read_pointer_raw[1] = read_pointer & 0xFF;
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W5500_write_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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W5500_write_byte(SPI_p_loc, 0x0001, (sock_nb*4)+1, 0x40);
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}
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int W5500_read_UDP_pckt (W5500_chip* SPI_p_loc, int sock_nb, unsigned char* data) {
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int size=0;
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unsigned char read_pointer_raw[10];
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unsigned char trash[20];
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unsigned short read_pointer;
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unsigned char W5_command[20];
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W5500_read_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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read_pointer = read_pointer_raw[1] + read_pointer_raw[0] * 256;
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// read first 8 bytes
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W5_command[0] = read_pointer_raw[0];
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W5_command[1] = read_pointer_raw[1];
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W5_command[2] = ((sock_nb*4)+3) * 0x08;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (W5_command, 3, trash, 3);
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SPI_p_loc->spi_port->transfer_2 (trash, 8, data, 8);
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size = data [7] + 256 * data[6];
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SPI_p_loc->spi_port->transfer_2 (trash, size, data+8, size);
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size = size + 8;
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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//printf ("size UDP:%d\r\n", size);
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read_pointer = read_pointer + size ;
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read_pointer_raw[0] = read_pointer / 256;
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read_pointer_raw[1] = read_pointer & 0xFF;
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W5500_write_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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W5500_write_byte(SPI_p_loc, 0x0001, (sock_nb*4)+1, 0x40);//command receive
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return size;
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}
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int W5500_read_MAC_pckt (W5500_chip* SPI_p_loc, int sock_nb, unsigned char* data) {
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int size=0;
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unsigned char read_pointer_raw[10];
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unsigned char trash[20];
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unsigned short read_pointer;
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unsigned char W5_command[20];
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W5500_read_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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read_pointer = read_pointer_raw[1] + read_pointer_raw[0] * 256;
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// read first 8 bytes
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W5_command[0] = read_pointer_raw[0];
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W5_command[1] = read_pointer_raw[1];
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W5_command[2] = ((sock_nb*4)+3) * 0x08;
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SPI_p_loc->cs->write(0);
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SPI_p_loc->spi_port->transfer_2 (W5_command, 3, trash, 3);
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SPI_p_loc->spi_port->transfer_2 (trash, 2, data, 2);
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size = data [1] + 256 * data[0];
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SPI_p_loc->spi_port->transfer_2 (trash, size-2, data+2, size-2);
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wait_us(1);
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SPI_p_loc->cs->write(1);
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wait_us(2);
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//printf ("size UDP:%d\r\n", size);
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read_pointer = read_pointer + size ;
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read_pointer_raw[0] = read_pointer / 256;
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read_pointer_raw[1] = read_pointer & 0xFF;
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W5500_write_short(SPI_p_loc, 0x0028, (sock_nb*4)+1, read_pointer_raw, 2);
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W5500_write_byte(SPI_p_loc, 0x0001, (sock_nb*4)+1, 0x40);
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return size;
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}
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void W5500_write_TX_buffer(W5500_chip* SPI_p_loc, int sock_nb, unsigned char* data, int size, int send_mac) {
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unsigned char write_pointer_raw[10];
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unsigned short write_pointer;
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W5500_read_short(SPI_p_loc, 0x0024, (sock_nb*4)+1, write_pointer_raw, 2);
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write_pointer = write_pointer_raw[1] + write_pointer_raw[0] * 256;
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W5500_write_long(SPI_p_loc, write_pointer, (sock_nb*4)+2, data, size);
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write_pointer = write_pointer + size ;
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write_pointer_raw[0] = write_pointer / 256;
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write_pointer_raw[1] = write_pointer & 0xFF;
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W5500_write_short(SPI_p_loc, 0x0024, (sock_nb*4)+1, write_pointer_raw, 2);
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if (send_mac == 1) {
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W5500_write_byte(SPI_p_loc, 0x0001, (sock_nb*4)+1, 0x21);
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} else {
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W5500_write_byte(SPI_p_loc, 0x0001, (sock_nb*4)+1, 0x20);
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}
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}
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static int W5500_configured = 0; // 0 not yet configured
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// 1 configured
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// 2 waiting reconfigure
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// 3 waiting reboot after reconfigure
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void W5500_re_configure (void) {
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W5500_configured = 2;
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}
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void W5500_re_configure_gateway(W5500_chip* SPI_p_loc) {
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unsigned char data[10];
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if ( (LAN_conf_applied.LAN_def_route_activ) && (is_telnet_routed) && (is_TDMA_master) ) {
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IP_int2char (LAN_conf_applied.LAN_def_route, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4); // gateway
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} else {
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IP_int2char (0x01010101, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4);
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}
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}
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void W5500_re_configure_periodic_call(W5500_chip* SPI_p_loc) {
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unsigned char data[10];
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if (W5500_configured == 4) { // reboot
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xF8);//!!! 0xC8 0xF8
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, (CONF_Eth_mode << 3) + 0xC0);//!!! 0xC8 0xF8
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W5500_configured = 1; //configured
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}
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if (W5500_configured == 3) { //wait
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W5500_configured = 4;
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}
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if (W5500_configured == 2) { //reconfigure
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IP_int2char (LAN_conf_applied.LAN_modem_IP, data);
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W5500_write_long(SPI_p_loc, 0x000F, 0x00, data, 4); // modem IP
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IP_int2char (LAN_conf_applied.LAN_subnet_mask, data);
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W5500_write_long(SPI_p_loc, 0x0005, 0x00, data, 4); // net mask
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if ( (LAN_conf_applied.LAN_def_route_activ) && (is_telnet_routed) && (is_TDMA_master) ) {
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IP_int2char (LAN_conf_applied.LAN_def_route, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4); // gateway
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} else {
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IP_int2char (0x01010101, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4);
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}
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0x78); // 0x48 0x78
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, (CONF_Eth_mode << 3) + 0x40); // 0x48 0x78
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W5500_configured = 3; //waiting reboot
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}
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}
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void W5500_initial_configure(W5500_chip* SPI_p_loc) {
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// reset
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W5500_write_byte(SPI_p_loc, 0x0000, 0x00, 0x80);//0x90
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wait_ms(500);
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W5500_write_byte(SPI_p_loc, 0x0000, 0x00, 0x00);//0x10
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//wait_ms(1600);
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xC8);
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0x78);//48 78 for 10MB full duplex / 40 half duplex !!!
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, (CONF_Eth_mode << 3) + 0x40);//48 78 for 10MB full duplex / 40 half duplex !!!
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wait_ms(1600);
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xF8);//c8 F8 for 10MB full duplex / c0 half duplexc8 !!!
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W5500_write_byte(SPI_p_loc, 0x002E, 0x00, (CONF_Eth_mode << 3) + 0xC0);//c8 F8 for 10MB full duplex / c0 half duplexc8 !!!
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xC8);
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//wait_ms(1600);
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//W5500_write_byte(SPI_p_loc, 0x002E, 0x00, 0xC0);
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//IP & MAC config
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//unsigned char data[20]={0x00,0x2E,0x00,4,5,6, 10,151,20,254};
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//unsigned char data[20]={0x00,0x2E,0x00,4,5,6, 192,168,0,254};
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unsigned char data[20]={0x00,0x2E,0x00,4,5,6};
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//W5500_write_long(SPI_p_loc, 0x0009, 0x00, data, 6); // modem MAC
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//W5500_write_long(SPI_p_loc, 0x0009, 0x00, LAN_conf_applied.modem_MAC, 6); // modem MAC
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W5500_write_long(SPI_p_loc, 0x0009, 0x00, CONF_modem_MAC, 6); // modem MAC
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IP_int2char (LAN_conf_applied.LAN_modem_IP, data);
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W5500_write_long(SPI_p_loc, 0x000F, 0x00, data, 4); // modem IP
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if ( (is_telnet_routed) && (is_TDMA_master) ) {
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IP_int2char (LAN_conf_applied.LAN_def_route, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4); // gateway
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} else {
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IP_int2char (0, data);
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W5500_write_long(SPI_p_loc, 0x0001, 0x00, data, 4);
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}
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IP_int2char (LAN_conf_applied.LAN_subnet_mask, data);
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W5500_write_long(SPI_p_loc, 0x0005, 0x00, data, 4); // net mask
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W5500_write_byte(SPI_p_loc, 0x0018, 0x00, 0x01);//sock interrupt mask
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// Socket Read buffer size
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W5500_write_byte(SPI_p_loc, 0x001E, 0x01, 0x08); //0 macraw 08
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W5500_write_byte(SPI_p_loc, 0x001E, 0x05, 0x02); //1 telnet 02
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W5500_write_byte(SPI_p_loc, 0x001E, 0x09, 0x04); //2 RTP 04
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W5500_write_byte(SPI_p_loc, 0x001E, 0x0D, 0x02); //3 DHCP 02
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W5500_write_byte(SPI_p_loc, 0x001E, 0x11, 0x00); //4
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W5500_write_byte(SPI_p_loc, 0x001E, 0x15, 0x00); //5
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W5500_write_byte(SPI_p_loc, 0x001E, 0x19, 0x00); //6
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W5500_write_byte(SPI_p_loc, 0x001E, 0x1D, 0x00); //7
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// Socket Write buffer size
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W5500_write_byte(SPI_p_loc, 0x001F, 0x01, 0x04); //0 macraw
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W5500_write_byte(SPI_p_loc, 0x001F, 0x05, 0x02); //1 telnet
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W5500_write_byte(SPI_p_loc, 0x001F, 0x09, 0x04); //2 RTP
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W5500_write_byte(SPI_p_loc, 0x001F, 0x0D, 0x02); //3 DHCP
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W5500_write_byte(SPI_p_loc, 0x001F, 0x11, 0x02); //4 UDP_FDD
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W5500_write_byte(SPI_p_loc, 0x001F, 0x15, 0x00); //5
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W5500_write_byte(SPI_p_loc, 0x001F, 0x19, 0x00); //6
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W5500_write_byte(SPI_p_loc, 0x001F, 0x1D, 0x00); //7
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// Socket 0 MAC RAW for packet switching
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W5500_write_byte(SPI_p_loc, 0x0000, 0x01, 0x34); //config B4 for classic
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W5500_write_byte(SPI_p_loc, 0x002C, 0x01, 0x04); //Interrupt mask : RECV
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wait_ms(10);
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W5500_write_byte(SPI_p_loc, 0x0001, 0x01, 0x01); //open
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// Socket 1 telnet
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W5500_write_byte(SPI_p_loc, 0x0000, 0x05, 0x01); //config
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wait_ms(10);
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data[0]=0x00; //port 0d23
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data[1]=0x17;
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W5500_write_short(SPI_p_loc, 0x0004, 0x05, data, 2); //port 23 (0x17)
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//W5500_write_byte(SPI_p_loc, 0x002C, 0x05, 0x00); //interrupt mask
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// Socket 2 RTP port 1519
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W5500_write_byte(SPI_p_loc, 0x0000, 0x09, 0x42); //config
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wait_ms(10);
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data[0]=0x05; //port 0d1519
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data[1]=0xEF;
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W5500_write_short(SPI_p_loc, 0x0004, 0x09, data, 2); //port rx 1519
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data[0]=0x05; //port 0d1516
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data[1]=0xEC;
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W5500_write_short(SPI_p_loc, 0x0010, 0x09, data, 2); //port tx 1516
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W5500_write_byte(SPI_p_loc, 0x0001, 0x09, 0x01); // open
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data[0]=10;
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data[1]=151;
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data[2]=0;
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data[3]=60;
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W5500_write_short(SPI_p_loc, 0x000C, 0x09, data, 4); //IP destination 10.151.0.21
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// Socket 3 DHCP server
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W5500_write_byte(SPI_p_loc, 0x0000, 0x0D, 0x02); //config
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wait_ms(10);
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data[0]=0x00; //port 0d67
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data[1]=0x43;
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W5500_write_short(SPI_p_loc, 0x0004, 0x0D, data, 2); //port rx 67
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data[0]=0x00; //port 0d68
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data[1]=0x44;
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W5500_write_short(SPI_p_loc, 0x0010, 0x0D, data, 2); //port tx 68
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W5500_write_byte(SPI_p_loc, 0x0001, 0x0D, 0x01); // open
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data[0]=255;
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data[1]=255;
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data[2]=255;
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data[3]=255;
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data[4]=255;
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data[5]=255;
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W5500_write_short(SPI_p_loc, 0x000C, 0x0D, data, 4); //IP destination 255.255.255.255
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W5500_write_short(SPI_p_loc, 0x0006, 0x0D, data, 6);
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// Socket 4 UDP_FDD
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W5500_write_byte(SPI_p_loc, 0x0000, 0x11, 0x42); //config
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wait_ms(10);
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data[0]=0x1A; //port TX 0d6716 = 0x1A3E
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data[1]=0x3E;
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W5500_write_short(SPI_p_loc, 0x0004, 0x11, data, 2);
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data[0]=0x1A; //port RX 0d6718 = 0x1A3C
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data[1]=0x3C;
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W5500_write_short(SPI_p_loc, 0x0010, 0x11, data, 2);
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W5500_write_byte(SPI_p_loc, 0x0001, 0x11, 0x01); // open
|
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IP_int2char (CONF_master_down_IP, data);
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W5500_write_short(SPI_p_loc, 0x000C, 0x11, data, 4);
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// Socket 5
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|
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// Socket 6
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|
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// Socket 7
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|
W5500_configured = 1;
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} |