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Fixed constrains and board stackup based on PCBWay recommendations

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This commit is contained in:
Vlastimil Slinták 2025-07-15 14:06:02 +02:00 • committed by Wojciech Kaczmarski
parent a1a40c5cc9
commit b78ae3aa55
2 changed files with 34 additions and 21 deletions
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28
linht-hw.kicad_pcb
View file

@ -3,12 +3,12 @@
(generator "pcbnew")
(generator_version "9.0")
(general
(thickness 1)
(thickness 0.982)
(legacy_teardrops no)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(0 "F.Cu" jumper)
(4 "In1.Cu" signal)
(6 "In2.Cu" signal)
(2 "B.Cu" signal)
@ -30,7 +30,7 @@
(29 "B.CrtYd" user "B.Courtyard")
(35 "F.Fab" user)
(33 "B.Fab" user)
(39 "User.1" user)
(39 "User.1" back)
(41 "User.2" user)
(43 "User.3" user)
(45 "User.4" user)
@ -53,9 +53,9 @@
)
(layer "dielectric 1"
(type "prepreg")
(thickness 0.1)
(thickness 0.196)
(material "FR4")
(epsilon_r 4.5)
(epsilon_r 4.74)
(loss_tangent 0.02)
)
(layer "In1.Cu"
@ -64,9 +64,9 @@
)
(layer "dielectric 2"
(type "core")
(thickness 0.64)
(thickness 0.43)
(material "FR4")
(epsilon_r 4.5)
(epsilon_r 4.6)
(loss_tangent 0.02)
)
(layer "In2.Cu"
@ -75,9 +75,9 @@
)
(layer "dielectric 3"
(type "prepreg")
(thickness 0.1)
(thickness 0.196)
(material "FR4")
(epsilon_r 4.5)
(epsilon_r 4.74)
(loss_tangent 0.02)
)
(layer "B.Cu"
@ -14270,13 +14270,13 @@
(footprint "parts:MCM-iMX93"
(layer "F.Cu")
(uuid "83ebd95b-cb75-4643-ae77-58fef415c704")
(at 122.225 126.2 90)
(at 125.93725 133.6995 90)
(property "Reference" "U1"
(at -35.616 -40.324 90)
(unlocked yes)
(layer "F.SilkS")
(hide yes)
(uuid "7e262b7d-6f9b-487f-9a68-9d035380bd8e")
(uuid "8e094eb0-1ed7-4939-90a3-4ed0b59ada29")
(effects
(font
(size 0.6 0.6)
@ -14289,7 +14289,7 @@
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "fe1707b5-0736-46c9-adff-21b42fcb3599")
(uuid "38f6e817-cda0-45b9-b094-a53dce58cb8d")
(effects
(font
(size 1 1)
@ -14302,7 +14302,7 @@
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "1ebbd974-dd48-44b2-8c89-4eb52bc104a4")
(uuid "1b54bf95-687f-47e5-86a3-7c5f91f35691")
(effects
(font
(size 1 1)
@ -14315,7 +14315,7 @@
(unlocked yes)
(layer "F.Fab")
(hide yes)
(uuid "1cce8b56-789e-4542-bcb7-7a8999c0b8a0")
(uuid "0ece8963-adcb-4c75-a6a0-fa1f82f2c640")
(effects
(font
(size 1 1)

27
linht-hw.kicad_pro
View file

@ -51,7 +51,13 @@
"min_clearance": 0.25
}
},
"diff_pair_dimensions": [],
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
@ -119,7 +125,7 @@
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_copper_edge_clearance": 0.25,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
@ -127,11 +133,11 @@
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_height": 0.6,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.1,
"min_track_width": 0.15,
"min_via_annular_width": 0.15,
"min_via_diameter": 0.5,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
@ -180,7 +186,9 @@
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"track_widths": [
0.0
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
@ -207,7 +215,12 @@
"spacing": 0.6
}
},
"via_dimensions": [],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false
},
"ipc2581": {