Koen Vandeputte ca3c7a8868 ar71xx: Fix potentially missed IRQ handling during dispatch ... If both interrupts are set in the current implementation only the 1st will be handled and the 2nd will be skipped due to the "if else" condition. Fix this by using the same approach as done for QCA955x just below it. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>		2019-09-13 16:39:44 +02:00
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backport-4.14	kernel: bump 4.14 to 4.14.143	2019-09-13 16:39:44 +02:00
files	generic: ar8216: group MIB counters and use two basic ones only by default	2019-05-20 21:17:57 +02:00
hack-4.14	kernel: bump 4.14 to 4.14.139	2019-08-27 10:31:06 +02:00
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other-files
pending-4.14	ar71xx: Fix potentially missed IRQ handling during dispatch	2019-09-13 16:39:44 +02:00
config-4.14	kernel: Activate CONFIG_OPTIMIZE_INLINING	2019-08-17 00:18:29 +02:00
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