forked from mirror/openwrt
b92bab633f
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.44 Removed upstreamed: generic-backport/220-v6.16-powerpc-boot-fix-build-with-gcc-15.patch[1] imx/patches-6.12/506-pending-PCI-imx6-Remove-apps_reset-toggle-in-_core_reset-function.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.44&id=e42ac65e257b875614dd8f435b026a3e379e92e6 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.44&id=90fa5884bc8f52cbf493492e32978c723c85e6ab Build system: x86/64 (Intel N150 based) Build-tested: flogic/gl.inet-gl-mt6000, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3, x86/64-glibc Run-tested: flogic/gl.inet-gl-mt6000, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3, x86/64-glibc Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/19892 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
98 lines
2.9 KiB
Diff
98 lines
2.9 KiB
Diff
From 20c14bbdff9e3be2ddbeffa266f08bae04216e63 Mon Sep 17 00:00:00 2001
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From: Minda Chen <minda.chen@starfivetech.com>
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Date: Sun, 25 Jun 2023 09:40:29 +0800
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Subject: [PATCH 09/55] uart: 8250: Add dw auto flow ctrl support
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Add designeware 8250 auto flow ctrl support. Enable
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it by add auto-flow-control in dts.
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Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
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---
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drivers/tty/serial/8250/8250_core.c | 2 ++
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drivers/tty/serial/8250/8250_dw.c | 3 +++
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drivers/tty/serial/8250/8250_port.c | 14 +++++++++++++-
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include/linux/serial_8250.h | 1 +
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include/uapi/linux/serial_core.h | 2 ++
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5 files changed, 21 insertions(+), 1 deletion(-)
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--- a/drivers/tty/serial/8250/8250_core.c
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+++ b/drivers/tty/serial/8250/8250_core.c
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@@ -810,6 +810,8 @@ int serial8250_register_8250_port(const
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uart->dl_read = up->dl_read;
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if (up->dl_write)
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uart->dl_write = up->dl_write;
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+ if (up->probe)
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+ uart->probe = up->probe;
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if (uart->port.type != PORT_8250_CIR) {
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if (uart_console_registered(&uart->port))
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--- a/drivers/tty/serial/8250/8250_dw.c
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+++ b/drivers/tty/serial/8250/8250_dw.c
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@@ -594,6 +594,9 @@ static int dw8250_probe(struct platform_
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data->msr_mask_off |= UART_MSR_TERI;
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}
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+ if (device_property_read_bool(dev, "auto-flow-control"))
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+ up->probe |= UART_PROBE_AFE;
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+
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/* If there is separate baudclk, get the rate from it. */
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data->clk = devm_clk_get_optional_enabled(dev, "baudclk");
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if (data->clk == NULL)
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--- a/drivers/tty/serial/8250/8250_port.c
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+++ b/drivers/tty/serial/8250/8250_port.c
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@@ -319,6 +319,14 @@ static const struct serial8250_config ua
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.rxtrig_bytes = {1, 8, 16, 30},
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.flags = UART_CAP_FIFO | UART_CAP_AFE,
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},
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+ [PORT_16550A_AFE] = {
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+ .name = "16550A_AFE",
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+ .fifo_size = 16,
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+ .tx_loadsz = 16,
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+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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+ .rxtrig_bytes = {1, 4, 8, 14},
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+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
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+ },
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};
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/* Uart divisor latch read */
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@@ -1124,6 +1132,11 @@ static void autoconfig_16550a(struct uar
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up->port.type = PORT_U6_16550A;
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up->capabilities |= UART_CAP_AFE;
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}
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+
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+ if ((up->port.type == PORT_16550A) && (up->probe & UART_PROBE_AFE)) {
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+ up->port.type = PORT_16550A_AFE;
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+ up->capabilities |= UART_CAP_AFE;
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+ }
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}
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/*
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@@ -2768,7 +2781,6 @@ serial8250_do_set_termios(struct uart_po
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if (termios->c_cflag & CRTSCTS)
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up->mcr |= UART_MCR_AFE;
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}
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-
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/*
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* Update the per-port timeout.
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*/
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--- a/include/linux/serial_8250.h
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+++ b/include/linux/serial_8250.h
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@@ -141,6 +141,7 @@ struct uart_8250_port {
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unsigned char probe;
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struct mctrl_gpios *gpios;
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#define UART_PROBE_RSA (1 << 0)
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+#define UART_PROBE_AFE (1 << 1)
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/*
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* Some bits in registers are cleared on a read, so they must
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--- a/include/uapi/linux/serial_core.h
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+++ b/include/uapi/linux/serial_core.h
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@@ -231,6 +231,8 @@
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/* Sunplus UART */
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#define PORT_SUNPLUS 123
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+#define PORT_16550A_AFE 124
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+
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/* Generic type identifier for ports which type is not important to userspace. */
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#define PORT_GENERIC (-1)
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